1 /* 2 * Configuation settings for the Renesas Solutions ECOVEC board 3 * 4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp. 5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com> 6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __ECOVEC_H 12 #define __ECOVEC_H 13 14 /* 15 * Address Interface BusWidth 16 *----------------------------------------- 17 * 0x0000_0000 U-Boot 16bit 18 * 0x0004_0000 Linux romImage 16bit 19 * 0x0014_0000 MTD for Linux 16bit 20 * 0x0400_0000 Internal I/O 16/32bit 21 * 0x0800_0000 DRAM 32bit 22 * 0x1800_0000 MFI 16bit 23 */ 24 25 #undef DEBUG 26 #define CONFIG_SH4 1 27 #define CONFIG_SH4A 1 28 #define CONFIG_CPU_SH7724 1 29 #define CONFIG_BOARD_LATE_INIT 1 30 #define CONFIG_ECOVEC 1 31 32 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 33 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 34 35 #define CONFIG_CMD_FLASH 36 #define CONFIG_CMD_MEMORY 37 #define CONFIG_CMD_NET 38 #define CONFIG_CMD_PING 39 #define CONFIG_CMD_MII 40 #define CONFIG_CMD_NFS 41 #define CONFIG_CMD_SDRAM 42 #define CONFIG_CMD_ENV 43 #define CONFIG_CMD_USB 44 #define CONFIG_CMD_FAT 45 #define CONFIG_CMD_EXT2 46 #define CONFIG_CMD_SAVEENV 47 48 #define CONFIG_USB_STORAGE 49 #define CONFIG_DOS_PARTITION 50 51 #define CONFIG_BAUDRATE 115200 52 #define CONFIG_BOOTDELAY 3 53 #define CONFIG_BOOTARGS "console=ttySC0,115200" 54 55 #define CONFIG_VERSION_VARIABLE 56 #undef CONFIG_SHOW_BOOT_PROGRESS 57 58 /* I2C */ 59 #define CONFIG_CMD_I2C 60 #define CONFIG_SYS_I2C 61 #define CONFIG_SYS_I2C_SH 62 #define CONFIG_SYS_I2C_SLAVE 0x7F 63 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2 64 #define CONFIG_SYS_I2C_SH_BASE0 0xA4470000 65 #define CONFIG_SYS_I2C_SH_SPEED0 100000 66 #define CONFIG_SYS_I2C_SH_BASE1 0xA4750000 67 #define CONFIG_SYS_I2C_SH_SPEED1 100000 68 #define CONFIG_SH_I2C_DATA_HIGH 4 69 #define CONFIG_SH_I2C_DATA_LOW 5 70 #define CONFIG_SH_I2C_CLOCK 41666666 71 72 /* Ether */ 73 #define CONFIG_SH_ETHER 1 74 #define CONFIG_SH_ETHER_USE_PORT (0) 75 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f) 76 #define CONFIG_PHY_SMSC 1 77 #define CONFIG_PHYLIB 78 #define CONFIG_BITBANGMII 79 #define CONFIG_BITBANGMII_MULTI 80 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 81 82 /* USB / R8A66597 */ 83 #define CONFIG_USB_R8A66597_HCD 84 #define CONFIG_R8A66597_BASE_ADDR 0xA4D80000 85 #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ 86 #define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ 87 #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ 88 #define CONFIG_SUPERH_ON_CHIP_R8A66597 89 90 /* undef to save memory */ 91 #define CONFIG_SYS_LONGHELP 92 /* Monitor Command Prompt */ 93 /* Buffer size for input from the Console */ 94 #define CONFIG_SYS_CBSIZE 256 95 /* Buffer size for Console output */ 96 #define CONFIG_SYS_PBSIZE 256 97 /* max args accepted for monitor commands */ 98 #define CONFIG_SYS_MAXARGS 16 99 /* Buffer size for Boot Arguments passed to kernel */ 100 #define CONFIG_SYS_BARGSIZE 512 101 /* List of legal baudrate settings for this board */ 102 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 103 104 /* SCIF */ 105 #define CONFIG_SCIF_CONSOLE 1 106 #define CONFIG_SCIF 1 107 #define CONFIG_CONS_SCIF0 1 108 109 /* Suppress display of console information at boot */ 110 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 111 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 112 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 113 114 /* SDRAM */ 115 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 116 #define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024) 117 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 118 119 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 120 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024) 121 /* Enable alternate, more extensive, memory test */ 122 #undef CONFIG_SYS_ALT_MEMTEST 123 /* Scratch address used by the alternate memory test */ 124 #undef CONFIG_SYS_MEMTEST_SCRATCH 125 126 /* Enable temporary baudrate change while serial download */ 127 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 128 129 /* FLASH */ 130 #define CONFIG_FLASH_CFI_DRIVER 1 131 #define CONFIG_SYS_FLASH_CFI 132 #undef CONFIG_SYS_FLASH_QUIET_TEST 133 #define CONFIG_SYS_FLASH_EMPTY_INFO 134 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 135 #define CONFIG_SYS_MAX_FLASH_SECT 512 136 137 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 138 #define CONFIG_SYS_MAX_FLASH_BANKS 1 139 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 140 141 /* Timeout for Flash erase operations (in ms) */ 142 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 143 /* Timeout for Flash write operations (in ms) */ 144 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 145 /* Timeout for Flash set sector lock bit operations (in ms) */ 146 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 147 /* Timeout for Flash clear lock bit operations (in ms) */ 148 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 149 150 /* 151 * Use hardware flash sectors protection instead 152 * of U-Boot software protection 153 */ 154 #undef CONFIG_SYS_FLASH_PROTECTION 155 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 156 157 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 158 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 159 /* Monitor size */ 160 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 161 /* Size of DRAM reserved for malloc() use */ 162 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 163 /* size in bytes reserved for initial data */ 164 #define CONFIG_SYS_GBL_DATA_SIZE (256) 165 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 166 167 /* ENV setting */ 168 #define CONFIG_ENV_IS_IN_FLASH 169 #define CONFIG_ENV_OVERWRITE 1 170 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 171 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 172 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 173 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 174 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 175 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 176 177 /* Board Clock */ 178 #define CONFIG_SYS_CLK_FREQ 41666666 179 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 180 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 181 #define CONFIG_SYS_TMU_CLK_DIV 4 182 183 #endif /* __ECOVEC_H */ 184