xref: /rk3399_rockchip-uboot/include/configs/ecovec.h (revision 77fe6e773af762676f4f30f646caa160e39a0bcc)
16d1d5cf9SNobuhiro Iwamatsu /*
26d1d5cf9SNobuhiro Iwamatsu  * Configuation settings for the Renesas Solutions ECOVEC board
36d1d5cf9SNobuhiro Iwamatsu  *
46d1d5cf9SNobuhiro Iwamatsu  * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
56d1d5cf9SNobuhiro Iwamatsu  * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
66d1d5cf9SNobuhiro Iwamatsu  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
76d1d5cf9SNobuhiro Iwamatsu  *
86d1d5cf9SNobuhiro Iwamatsu  * See file CREDITS for list of people who contributed to this
96d1d5cf9SNobuhiro Iwamatsu  * project.
106d1d5cf9SNobuhiro Iwamatsu  *
116d1d5cf9SNobuhiro Iwamatsu  * This program is free software; you can redistribute it and/or
126d1d5cf9SNobuhiro Iwamatsu  * modify it under the terms of the GNU General Public License as
136d1d5cf9SNobuhiro Iwamatsu  * published by the Free Software Foundation; either version 2 of
146d1d5cf9SNobuhiro Iwamatsu  * the License, or (at your option) any later version.
156d1d5cf9SNobuhiro Iwamatsu  *
166d1d5cf9SNobuhiro Iwamatsu  * This program is distributed in the hope that it will be useful,
176d1d5cf9SNobuhiro Iwamatsu  * but WITHOUT ANY WARRANTY; without even the implied warranty of
186d1d5cf9SNobuhiro Iwamatsu  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
196d1d5cf9SNobuhiro Iwamatsu  * GNU General Public License for more details.
206d1d5cf9SNobuhiro Iwamatsu  *
216d1d5cf9SNobuhiro Iwamatsu  * You should have received a copy of the GNU General Public License
226d1d5cf9SNobuhiro Iwamatsu  * along with this program; if not, write to the Free Software
236d1d5cf9SNobuhiro Iwamatsu  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
246d1d5cf9SNobuhiro Iwamatsu  * MA 02111-1307 USA
256d1d5cf9SNobuhiro Iwamatsu  */
266d1d5cf9SNobuhiro Iwamatsu 
276d1d5cf9SNobuhiro Iwamatsu #ifndef __ECOVEC_H
286d1d5cf9SNobuhiro Iwamatsu #define __ECOVEC_H
296d1d5cf9SNobuhiro Iwamatsu 
306d1d5cf9SNobuhiro Iwamatsu /*
316d1d5cf9SNobuhiro Iwamatsu  *  Address      Interface        BusWidth
326d1d5cf9SNobuhiro Iwamatsu  *-----------------------------------------
336d1d5cf9SNobuhiro Iwamatsu  *  0x0000_0000  U-Boot           16bit
346d1d5cf9SNobuhiro Iwamatsu  *  0x0004_0000  Linux romImage   16bit
356d1d5cf9SNobuhiro Iwamatsu  *  0x0014_0000  MTD for Linux    16bit
366d1d5cf9SNobuhiro Iwamatsu  *  0x0400_0000  Internal I/O     16/32bit
376d1d5cf9SNobuhiro Iwamatsu  *  0x0800_0000  DRAM             32bit
386d1d5cf9SNobuhiro Iwamatsu  *  0x1800_0000  MFI              16bit
396d1d5cf9SNobuhiro Iwamatsu  */
406d1d5cf9SNobuhiro Iwamatsu 
416d1d5cf9SNobuhiro Iwamatsu #undef DEBUG
426d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH		1
436d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH4		1
446d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH4A		1
456d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CPU_SH7724	1
46*77fe6e77SNobuhiro Iwamatsu #define CONFIG_BOARD_LATE_INIT		1
476d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ECOVEC		1
486d1d5cf9SNobuhiro Iwamatsu 
496d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
506d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
516d1d5cf9SNobuhiro Iwamatsu 
526d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_FLASH
536d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_MEMORY
546d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_NET
556d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_PING
566d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_MII
576d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_NFS
586d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM
596d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_ENV
606d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_USB
616d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_FAT
626d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_EXT2
636d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_SAVEENV
646d1d5cf9SNobuhiro Iwamatsu 
656d1d5cf9SNobuhiro Iwamatsu #define CONFIG_USB_STORAGE
666d1d5cf9SNobuhiro Iwamatsu #define CONFIG_DOS_PARTITION
676d1d5cf9SNobuhiro Iwamatsu 
686d1d5cf9SNobuhiro Iwamatsu #define CONFIG_BAUDRATE		115200
696d1d5cf9SNobuhiro Iwamatsu #define CONFIG_BOOTDELAY	3
706d1d5cf9SNobuhiro Iwamatsu #define CONFIG_BOOTARGS		"console=ttySC0,115200"
716d1d5cf9SNobuhiro Iwamatsu 
726d1d5cf9SNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE
736d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SHOW_BOOT_PROGRESS
746d1d5cf9SNobuhiro Iwamatsu 
756d1d5cf9SNobuhiro Iwamatsu /* I2C */
766d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CMD_I2C
776d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C 1
786d1d5cf9SNobuhiro Iwamatsu #define CONFIG_HARD_I2C		1
796d1d5cf9SNobuhiro Iwamatsu #define CONFIG_I2C_MULTI_BUS	1
806d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MAX_I2C_BUS	2
816d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_MODULE	1
826d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SPEED	100000 /* 100 kHz */
836d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE	0x7F
846d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH	4
856d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW 	5
866d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK  	41666666
876d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_BASE0		0xA4470000
886d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_I2C_BASE1		0xA4750000
896d1d5cf9SNobuhiro Iwamatsu 
906d1d5cf9SNobuhiro Iwamatsu /* Ether */
916d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_ETHER 1
926d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT (0)
936d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
94e50edf90SNobuhiro Iwamatsu #define CONFIG_PHY_SMSC 1
956d1d5cf9SNobuhiro Iwamatsu #define CONFIG_PHYLIB
966d1d5cf9SNobuhiro Iwamatsu #define CONFIG_BITBANGMII
976d1d5cf9SNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI
986d1d5cf9SNobuhiro Iwamatsu 
996d1d5cf9SNobuhiro Iwamatsu /* USB / R8A66597 */
1006d1d5cf9SNobuhiro Iwamatsu #define CONFIG_USB_R8A66597_HCD
1016d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_BASE_ADDR   0xA4D80000
1026d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_XTAL        0x0000  /* 12MHz */
1036d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_LDRV        0x8000  /* 3.3V */
1046d1d5cf9SNobuhiro Iwamatsu #define CONFIG_R8A66597_ENDIAN      0x0000  /* little */
1056d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SUPERH_ON_CHIP_R8A66597
1066d1d5cf9SNobuhiro Iwamatsu 
1076d1d5cf9SNobuhiro Iwamatsu /* undef to save memory	*/
1086d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_LONGHELP
1096d1d5cf9SNobuhiro Iwamatsu /* Monitor Command Prompt */
1106d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_PROMPT		"=> "
1116d1d5cf9SNobuhiro Iwamatsu /* Buffer size for input from the Console */
1126d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_CBSIZE		256
1136d1d5cf9SNobuhiro Iwamatsu /* Buffer size for Console output */
1146d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_PBSIZE		256
1156d1d5cf9SNobuhiro Iwamatsu /* max args accepted for monitor commands */
1166d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MAXARGS		16
1176d1d5cf9SNobuhiro Iwamatsu /* Buffer size for Boot Arguments passed to kernel */
1186d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_BARGSIZE	512
1196d1d5cf9SNobuhiro Iwamatsu /* List of legal baudrate settings for this board */
1206d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
1216d1d5cf9SNobuhiro Iwamatsu 
1226d1d5cf9SNobuhiro Iwamatsu /* SCIF */
1236d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE	1
1246d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SCIF		1
1256d1d5cf9SNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0	1
1266d1d5cf9SNobuhiro Iwamatsu 
1276d1d5cf9SNobuhiro Iwamatsu /* Suppress display of console information at boot */
1286d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_CONSOLE_INFO_QUIET
1296d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
1306d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
1316d1d5cf9SNobuhiro Iwamatsu 
1326d1d5cf9SNobuhiro Iwamatsu /* SDRAM */
1336d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_BASE	(0x88000000)
1346d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_SIZE	(256 * 1024 * 1024)
1356d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
1366d1d5cf9SNobuhiro Iwamatsu 
1376d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
1386d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
1396d1d5cf9SNobuhiro Iwamatsu /* Enable alternate, more extensive, memory test */
1406d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_ALT_MEMTEST
1416d1d5cf9SNobuhiro Iwamatsu /* Scratch address used by the alternate memory test */
1426d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_MEMTEST_SCRATCH
1436d1d5cf9SNobuhiro Iwamatsu 
1446d1d5cf9SNobuhiro Iwamatsu /* Enable temporary baudrate change while serial download */
1456d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
1466d1d5cf9SNobuhiro Iwamatsu 
1476d1d5cf9SNobuhiro Iwamatsu /* FLASH */
1486d1d5cf9SNobuhiro Iwamatsu #define CONFIG_FLASH_CFI_DRIVER 1
1496d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_CFI
1506d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_FLASH_QUIET_TEST
1516d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_EMPTY_INFO
1526d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_BASE	(0xA0000000)
1536d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_SECT	512
1546d1d5cf9SNobuhiro Iwamatsu 
1556d1d5cf9SNobuhiro Iwamatsu /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
1566d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_BANKS	1
1576d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
1586d1d5cf9SNobuhiro Iwamatsu 
1596d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash erase operations (in ms) */
1606d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
1616d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash write operations (in ms) */
1626d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
1636d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash set sector lock bit operations (in ms) */
1646d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
1656d1d5cf9SNobuhiro Iwamatsu /* Timeout for Flash clear lock bit operations (in ms) */
1666d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
1676d1d5cf9SNobuhiro Iwamatsu 
1686d1d5cf9SNobuhiro Iwamatsu /*
1696d1d5cf9SNobuhiro Iwamatsu  * Use hardware flash sectors protection instead
1706d1d5cf9SNobuhiro Iwamatsu  * of U-Boot software protection
1716d1d5cf9SNobuhiro Iwamatsu  */
1726d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_FLASH_PROTECTION
1736d1d5cf9SNobuhiro Iwamatsu #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
1746d1d5cf9SNobuhiro Iwamatsu 
1756d1d5cf9SNobuhiro Iwamatsu /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
1766d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
1776d1d5cf9SNobuhiro Iwamatsu /* Monitor size */
1786d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
1796d1d5cf9SNobuhiro Iwamatsu /* Size of DRAM reserved for malloc() use */
1806d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
1816d1d5cf9SNobuhiro Iwamatsu /* size in bytes reserved for initial data */
1826d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_GBL_DATA_SIZE	(256)
1836d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
1846d1d5cf9SNobuhiro Iwamatsu 
1856d1d5cf9SNobuhiro Iwamatsu /* ENV setting */
1866d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_IS_IN_FLASH
1876d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE	1
1886d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
1896d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
1906d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
1916d1d5cf9SNobuhiro Iwamatsu /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
1926d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
1936d1d5cf9SNobuhiro Iwamatsu #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
1946d1d5cf9SNobuhiro Iwamatsu 
1956d1d5cf9SNobuhiro Iwamatsu /* Board Clock */
1966d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 41666666
1976d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV      4
1986d1d5cf9SNobuhiro Iwamatsu #define CONFIG_SYS_HZ       1000
1996d1d5cf9SNobuhiro Iwamatsu 
2006d1d5cf9SNobuhiro Iwamatsu #endif	/* __ECOVEC_H */
201