1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated. 4 * Lokesh Vutla <lokeshvutla@ti.com> 5 * 6 * Configuration settings for the TI DRA7XX board. 7 * See ti_omap5_common.h for omap5 common settings. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_DRA7XX_EVM_H 13 #define __CONFIG_DRA7XX_EVM_H 14 15 #define CONFIG_DRA7XX 16 #define CONFIG_BOARD_EARLY_INIT_F 17 18 #ifdef CONFIG_SPL_BUILD 19 #define CONFIG_IODELAY_RECALIBRATION 20 #endif 21 22 #define CONFIG_VERY_BIG_RAM 23 #define CONFIG_NR_DRAM_BANKS 2 24 #define CONFIG_MAX_MEM_MAPPED 0x80000000 25 26 #ifndef CONFIG_QSPI_BOOT 27 /* MMC ENV related defines */ 28 #define CONFIG_ENV_IS_IN_MMC 29 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 30 #define CONFIG_ENV_SIZE (128 << 10) 31 #define CONFIG_ENV_OFFSET 0xE0000 32 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 33 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 34 #endif 35 36 #if (CONFIG_CONS_INDEX == 1) 37 #define CONSOLEDEV "ttyO0" 38 #elif (CONFIG_CONS_INDEX == 3) 39 #define CONSOLEDEV "ttyO2" 40 #endif 41 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 42 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 43 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 44 #define CONFIG_BAUDRATE 115200 45 46 #define CONFIG_SYS_OMAP_ABE_SYSCK 47 48 #ifndef CONFIG_SPL_BUILD 49 /* Define the default GPT table for eMMC */ 50 #define PARTS_DEFAULT \ 51 /* Linux partitions */ \ 52 "uuid_disk=${uuid_gpt_disk};" \ 53 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 54 /* Android partitions */ \ 55 "partitions_android=" \ 56 "uuid_disk=${uuid_gpt_disk};" \ 57 "name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \ 58 "name=bootloader,size=384K,uuid=${uuid_gpt_bootloader};" \ 59 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ 60 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ 61 "name=efs,start=1280K,size=16M,uuid=${uuid_gpt_efs};" \ 62 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ 63 "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ 64 "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ 65 "name=system,size=768M,uuid=${uuid_gpt_system};" \ 66 "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ 67 "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ 68 "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ 69 "name=userdata,size=-,uuid=${uuid_gpt_userdata}" 70 71 #define DFU_ALT_INFO_MMC \ 72 "dfu_alt_info_mmc=" \ 73 "boot part 0 1;" \ 74 "rootfs part 0 2;" \ 75 "MLO fat 0 1;" \ 76 "MLO.raw raw 0x100 0x100;" \ 77 "u-boot.img.raw raw 0x300 0x400;" \ 78 "spl-os-args.raw raw 0x80 0x80;" \ 79 "spl-os-image.raw raw 0x900 0x2000;" \ 80 "spl-os-args fat 0 1;" \ 81 "spl-os-image fat 0 1;" \ 82 "u-boot.img fat 0 1;" \ 83 "uEnv.txt fat 0 1\0" 84 85 #define DFU_ALT_INFO_EMMC \ 86 "dfu_alt_info_emmc=" \ 87 "rawemmc raw 0 3751936;" \ 88 "boot part 1 1;" \ 89 "rootfs part 1 2;" \ 90 "MLO fat 1 1;" \ 91 "MLO.raw raw 0x100 0x100;" \ 92 "u-boot.img.raw raw 0x300 0x400;" \ 93 "spl-os-args.raw raw 0x80 0x80;" \ 94 "spl-os-image.raw raw 0x900 0x2000;" \ 95 "spl-os-args fat 1 1;" \ 96 "spl-os-image fat 1 1;" \ 97 "u-boot.img fat 1 1;" \ 98 "uEnv.txt fat 1 1\0" 99 100 #define DFU_ALT_INFO_RAM \ 101 "dfu_alt_info_ram=" \ 102 "kernel ram 0x80200000 0x4000000;" \ 103 "fdt ram 0x80f80000 0x80000;" \ 104 "ramdisk ram 0x81000000 0x4000000\0" 105 106 #define DFU_ALT_INFO_QSPI \ 107 "dfu_alt_info_qspi=" \ 108 "MLO raw 0x0 0x010000;" \ 109 "MLO.backup1 raw 0x010000 0x010000;" \ 110 "MLO.backup2 raw 0x020000 0x010000;" \ 111 "MLO.backup3 raw 0x030000 0x010000;" \ 112 "u-boot.img raw 0x040000 0x0100000;" \ 113 "u-boot-spl-os raw 0x140000 0x080000;" \ 114 "u-boot-env raw 0x1C0000 0x010000;" \ 115 "u-boot-env.backup raw 0x1D0000 0x010000;" \ 116 "kernel raw 0x1E0000 0x800000\0" 117 118 #define DFUARGS \ 119 "dfu_bufsiz=0x10000\0" \ 120 DFU_ALT_INFO_MMC \ 121 DFU_ALT_INFO_EMMC \ 122 DFU_ALT_INFO_RAM \ 123 DFU_ALT_INFO_QSPI 124 #else 125 /* Discard fastboot in SPL build, to spare some space */ 126 #undef CONFIG_FASTBOOT 127 #undef CONFIG_USB_FUNCTION_FASTBOOT 128 #undef CONFIG_CMD_FASTBOOT 129 #undef CONFIG_ANDROID_BOOT_IMAGE 130 #undef CONFIG_FASTBOOT_BUF_ADDR 131 #undef CONFIG_FASTBOOT_BUF_SIZE 132 #undef CONFIG_FASTBOOT_FLASH 133 #endif 134 135 #ifdef CONFIG_SPL_BUILD 136 #undef CONFIG_CMD_BOOTD 137 #ifdef CONFIG_SPL_DFU_SUPPORT 138 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 139 #define CONFIG_SPL_HASH_SUPPORT 140 #define DFU_ALT_INFO_RAM \ 141 "dfu_alt_info_ram=" \ 142 "kernel ram 0x80200000 0x4000000;" \ 143 "fdt ram 0x80f80000 0x80000;" \ 144 "ramdisk ram 0x81000000 0x4000000\0" 145 #define DFUARGS \ 146 "dfu_bufsiz=0x10000\0" \ 147 DFU_ALT_INFO_RAM 148 #endif 149 #endif 150 151 #include <configs/ti_omap5_common.h> 152 153 /* Enhance our eMMC support / experience. */ 154 #define CONFIG_CMD_GPT 155 #define CONFIG_EFI_PARTITION 156 #define CONFIG_RANDOM_UUID 157 #define CONFIG_HSMMC2_8BIT 158 159 /* CPSW Ethernet */ 160 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 161 #define CONFIG_BOOTP_DNS2 162 #define CONFIG_BOOTP_SEND_HOSTNAME 163 #define CONFIG_BOOTP_GATEWAY 164 #define CONFIG_BOOTP_SUBNETMASK 165 #define CONFIG_NET_RETRY_COUNT 10 166 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 167 #define CONFIG_MII /* Required in net/eth.c */ 168 #define CONFIG_PHY_GIGE /* per-board part of CPSW */ 169 #define CONFIG_PHYLIB 170 #define CONFIG_PHY_TI 171 172 /* SPI */ 173 #undef CONFIG_OMAP3_SPI 174 #define CONFIG_TI_SPI_MMAP 175 #define CONFIG_SF_DEFAULT_SPEED 76800000 176 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 177 #define CONFIG_QSPI_QUAD_SUPPORT 178 179 #ifdef CONFIG_SPL_BUILD 180 #undef CONFIG_DM_SPI 181 #undef CONFIG_DM_SPI_FLASH 182 #endif 183 184 /* 185 * Default to using SPI for environment, etc. 186 * 0x000000 - 0x010000 : QSPI.SPL (64KiB) 187 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB) 188 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB) 189 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB) 190 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 191 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 192 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 193 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 194 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 195 * 0x9E0000 - 0x2000000 : USERLAND 196 */ 197 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 198 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 199 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 200 #if defined(CONFIG_QSPI_BOOT) 201 #define CONFIG_ENV_IS_IN_SPI_FLASH 202 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 203 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 204 #define CONFIG_ENV_SIZE (64 << 10) 205 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 206 #define CONFIG_ENV_OFFSET 0x1C0000 207 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000 208 #endif 209 210 /* SPI SPL */ 211 #define CONFIG_TI_EDMA3 212 #define CONFIG_SPL_SPI_LOAD 213 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 214 215 #define CONFIG_SUPPORT_EMMC_BOOT 216 217 /* USB xHCI HOST */ 218 #define CONFIG_USB_XHCI_OMAP 219 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 220 221 #define CONFIG_OMAP_USB_PHY 222 #define CONFIG_OMAP_USB2PHY2_HOST 223 224 /* SATA */ 225 #define CONFIG_BOARD_LATE_INIT 226 #define CONFIG_SCSI 227 #define CONFIG_LIBATA 228 #define CONFIG_SCSI_AHCI 229 #define CONFIG_SCSI_AHCI_PLAT 230 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 231 #define CONFIG_SYS_SCSI_MAX_LUN 1 232 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 233 CONFIG_SYS_SCSI_MAX_LUN) 234 235 /* NAND support */ 236 #ifdef CONFIG_NAND 237 /* NAND: device related configs */ 238 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 239 #define CONFIG_SYS_NAND_OOBSIZE 64 240 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 241 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 242 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 243 CONFIG_SYS_NAND_PAGE_SIZE) 244 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 245 /* NAND: driver related configs */ 246 #define CONFIG_NAND_OMAP_GPMC 247 #define CONFIG_NAND_OMAP_ELM 248 #define CONFIG_SYS_NAND_ONFI_DETECTION 249 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 250 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 251 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 252 10, 11, 12, 13, 14, 15, 16, 17, \ 253 18, 19, 20, 21, 22, 23, 24, 25, \ 254 26, 27, 28, 29, 30, 31, 32, 33, \ 255 34, 35, 36, 37, 38, 39, 40, 41, \ 256 42, 43, 44, 45, 46, 47, 48, 49, \ 257 50, 51, 52, 53, 54, 55, 56, 57, } 258 #define CONFIG_SYS_NAND_ECCSIZE 512 259 #define CONFIG_SYS_NAND_ECCBYTES 14 260 #define MTDIDS_DEFAULT "nand0=nand.0" 261 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ 262 "128k(NAND.SPL)," \ 263 "128k(NAND.SPL.backup1)," \ 264 "128k(NAND.SPL.backup2)," \ 265 "128k(NAND.SPL.backup3)," \ 266 "256k(NAND.u-boot-spl-os)," \ 267 "1m(NAND.u-boot)," \ 268 "128k(NAND.u-boot-env)," \ 269 "128k(NAND.u-boot-env.backup1)," \ 270 "8m(NAND.kernel)," \ 271 "-(NAND.file-system)" 272 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 273 /* NAND: SPL related configs */ 274 #ifdef CONFIG_SPL_NAND_SUPPORT 275 #define CONFIG_SPL_NAND_AM33XX_BCH 276 #endif 277 /* NAND: SPL falcon mode configs */ 278 #ifdef CONFIG_SPL_OS_BOOT 279 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/ 280 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ 281 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 282 #endif 283 #endif /* !CONFIG_NAND */ 284 285 /* Parallel NOR Support */ 286 #if defined(CONFIG_NOR) 287 /* NOR: device related configs */ 288 #define CONFIG_SYS_MAX_FLASH_SECT 512 289 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 290 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ 291 /* #define CONFIG_INIT_IGNORE_ERROR */ 292 #undef CONFIG_SYS_NO_FLASH 293 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 294 #define CONFIG_SYS_FLASH_PROTECTION 295 #define CONFIG_SYS_FLASH_CFI 296 #define CONFIG_FLASH_CFI_DRIVER 297 #define CONFIG_FLASH_CFI_MTD 298 #define CONFIG_SYS_MAX_FLASH_BANKS 1 299 #define CONFIG_SYS_FLASH_BASE (0x08000000) 300 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 301 /* Reduce SPL size by removing unlikey targets */ 302 #ifdef CONFIG_NOR_BOOT 303 #define CONFIG_ENV_IS_IN_FLASH 304 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ 305 #define MTDIDS_DEFAULT "nor0=physmap-flash.0" 306 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ 307 "128k(NOR.SPL)," \ 308 "128k(NOR.SPL.backup1)," \ 309 "128k(NOR.SPL.backup2)," \ 310 "128k(NOR.SPL.backup3)," \ 311 "256k(NOR.u-boot-spl-os)," \ 312 "1m(NOR.u-boot)," \ 313 "128k(NOR.u-boot-env)," \ 314 "128k(NOR.u-boot-env.backup1)," \ 315 "8m(NOR.kernel)," \ 316 "-(NOR.rootfs)" 317 #define CONFIG_ENV_OFFSET 0x001c0000 318 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000 319 #endif 320 #endif /* NOR support */ 321 322 /* EEPROM */ 323 #define CONFIG_EEPROM_CHIP_ADDRESS 0x50 324 #define CONFIG_EEPROM_BUS_ADDRESS 0 325 326 #endif /* __CONFIG_DRA7XX_EVM_H */ 327