1 /* 2 * (C) Copyright 2003 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 /* 25 * This file contains the configuration parameters for the dbau1x00 board. 26 */ 27 28 #ifndef __CONFIG_H 29 #define __CONFIG_H 30 31 #define CONFIG_MIPS32 1 /* MIPS32 CPU core */ 32 #define CONFIG_DBAU1X00 1 33 #define CONFIG_AU1X00 1 /* alchemy series cpu */ 34 35 #ifdef CONFIG_DBAU1000 36 /* Also known as Merlot */ 37 #define CONFIG_AU1000 1 38 #else 39 #ifdef CONFIG_DBAU1100 40 #define CONFIG_AU1100 1 41 #else 42 #ifdef CONFIG_DBAU1500 43 #define CONFIG_AU1500 1 44 #else 45 #ifdef CONFIG_DBAU1550 46 /* Cabernet */ 47 #define CONFIG_AU1550 1 48 #else 49 #error "No valid board set" 50 #endif 51 #endif 52 #endif 53 #endif 54 55 #define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */ 56 57 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ 58 59 #define CONFIG_BAUDRATE 115200 60 61 /* valid baudrates */ 62 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 63 64 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 65 #undef CONFIG_BOOTARGS 66 67 #define CONFIG_EXTRA_ENV_SETTINGS \ 68 "addmisc=setenv bootargs $(bootargs) " \ 69 "console=ttyS0,$(baudrate) " \ 70 "panic=1\0" \ 71 "bootfile=/tftpboot/vmlinux.srec\0" \ 72 "load=tftp 80500000 $(u-boot)\0" \ 73 "" 74 75 #ifdef CONFIG_DBAU1550 76 /* Boot from flash by default, revert to bootp */ 77 #define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm" 78 79 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_FLASH | CFG_CMD_LOADB | CFG_CMD_NET) & \ 80 ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FPGA | CFG_CMD_IDE | \ 81 CFG_CMD_MII | CFG_CMD_RUN | CFG_CMD_BDI | CFG_CMD_BEDBUG | \ 82 CFG_CMD_NFS | CFG_CMD_ELF | CFG_CMD_PCMCIA | CFG_CMD_I2C)) 83 #else /* CONFIG_DBAU1550 */ 84 /* Boot from Compact flash partition 2 as default */ 85 #define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;bootm" 86 87 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP | CFG_CMD_ELF) & \ 88 ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \ 89 CFG_CMD_MII | CFG_CMD_LOADS | CFG_CMD_RUN | CFG_CMD_LOADB | \ 90 CFG_CMD_ELF | CFG_CMD_BDI | CFG_CMD_BEDBUG)) 91 #endif /* CONFIG_DBAU1550 */ 92 93 #include <cmd_confdefs.h> 94 95 /* 96 * Miscellaneous configurable options 97 */ 98 #define CFG_LONGHELP /* undef to save memory */ 99 100 #define CFG_PROMPT "DbAu1xx0 # " /* Monitor Command Prompt */ 101 102 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 103 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ 104 #define CFG_MAXARGS 16 /* max number of command args*/ 105 106 #define CFG_MALLOC_LEN 128*1024 107 108 #define CFG_BOOTPARAMS_LEN 128*1024 109 110 #define CFG_MHZ 396 111 112 #if (CFG_MHZ % 12) != 0 113 #error "Invalid CPU frequency - must be multiple of 12!" 114 #endif 115 116 #define CFG_HZ (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */ 117 118 #define CFG_SDRAM_BASE 0x80000000 /* Cached addr */ 119 120 #define CFG_LOAD_ADDR 0x81000000 /* default load address */ 121 122 #define CFG_MEMTEST_START 0x80100000 123 #define CFG_MEMTEST_END 0x80800000 124 125 /*----------------------------------------------------------------------- 126 * FLASH and environment organization 127 */ 128 #ifdef CONFIG_DBAU1550 129 130 #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ 131 #define CFG_MAX_FLASH_SECT (512) /* max number of sectors on one chip */ 132 133 #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */ 134 #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */ 135 136 #define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} 137 138 #else /* CONFIG_DBAU1550 */ 139 140 #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ 141 #define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ 142 143 #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ 144 #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ 145 146 #endif /* CONFIG_DBAU1550 */ 147 148 #define CFG_FLASH_CFI 1 149 #define CFG_FLASH_CFI_DRIVER 1 150 151 /* The following #defines are needed to get flash environment right */ 152 #define CFG_MONITOR_BASE TEXT_BASE 153 #define CFG_MONITOR_LEN (192 << 10) 154 155 #define CFG_INIT_SP_OFFSET 0x400000 156 157 /* We boot from this flash, selected with dip switch */ 158 #define CFG_FLASH_BASE PHYS_FLASH_2 159 160 /* timeout values are in ticks */ 161 #define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */ 162 #define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */ 163 164 #define CFG_ENV_IS_NOWHERE 1 165 166 /* Address and size of Primary Environment Sector */ 167 #define CFG_ENV_ADDR 0xB0030000 168 #define CFG_ENV_SIZE 0x10000 169 170 #define CONFIG_FLASH_16BIT 171 172 #define CONFIG_NR_DRAM_BANKS 2 173 174 #define CONFIG_NET_MULTI 175 176 #ifdef CONFIG_DBAU1550 177 #define MEM_SIZE 192 178 #else 179 #define MEM_SIZE 64 180 #endif 181 182 #define CONFIG_MEMSIZE_IN_BYTES 183 184 #ifndef CONFIG_DBAU1550 185 /*---ATA PCMCIA ------------------------------------*/ 186 #define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ 187 #define CFG_PCMCIA_MEM_ADDR 0x20000000 188 #define CONFIG_PCMCIA_SLOT_A 189 190 #define CONFIG_ATAPI 1 191 #define CONFIG_MAC_PARTITION 1 192 193 /* We run CF in "true ide" mode or a harddrive via pcmcia */ 194 #define CONFIG_IDE_PCMCIA 1 195 196 /* We only support one slot for now */ 197 #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ 198 #define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ 199 200 #undef CONFIG_IDE_LED /* LED for ide not supported */ 201 #undef CONFIG_IDE_RESET /* reset for ide not supported */ 202 203 #define CFG_ATA_IDE0_OFFSET 0x0000 204 205 #define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR 206 207 /* Offset for data I/O */ 208 #define CFG_ATA_DATA_OFFSET 8 209 210 /* Offset for normal register accesses */ 211 #define CFG_ATA_REG_OFFSET 0 212 213 /* Offset for alternate registers */ 214 #define CFG_ATA_ALT_OFFSET 0x0100 215 #endif /* CONFIG_DBAU1550 */ 216 217 /*----------------------------------------------------------------------- 218 * Cache Configuration 219 */ 220 #define CFG_DCACHE_SIZE 16384 221 #define CFG_ICACHE_SIZE 16384 222 #define CFG_CACHELINE_SIZE 32 223 224 #endif /* __CONFIG_H */ 225