xref: /rk3399_rockchip-uboot/include/configs/db-88f6820-gp.h (revision e80f1e85d6010ca9d19edf2ec333cf30af6cbbd0)
12bae75a4SStefan Roese /*
22bae75a4SStefan Roese  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
32bae75a4SStefan Roese  *
42bae75a4SStefan Roese  * SPDX-License-Identifier:	GPL-2.0+
52bae75a4SStefan Roese  */
62bae75a4SStefan Roese 
72bae75a4SStefan Roese #ifndef _CONFIG_DB_88F6820_GP_H
82bae75a4SStefan Roese #define _CONFIG_DB_88F6820_GP_H
92bae75a4SStefan Roese 
102bae75a4SStefan Roese /*
112bae75a4SStefan Roese  * High Level Configuration Options (easy to change)
122bae75a4SStefan Roese  */
132bae75a4SStefan Roese #define CONFIG_ARMADA_XP		/* SOC Family Name */
142bae75a4SStefan Roese #define CONFIG_DB_88F6820_GP		/* Board target name for DDR training */
152bae75a4SStefan Roese 
162bae75a4SStefan Roese #define CONFIG_SYS_L2_PL310
172bae75a4SStefan Roese 
182bae75a4SStefan Roese #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
192bae75a4SStefan Roese #define CONFIG_SYS_GENERIC_BOARD
202bae75a4SStefan Roese #define CONFIG_DISPLAY_BOARDINFO_LATE
212bae75a4SStefan Roese 
222bae75a4SStefan Roese #define	CONFIG_SYS_TEXT_BASE	0x04000000
232bae75a4SStefan Roese #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
242bae75a4SStefan Roese 
252bae75a4SStefan Roese /*
262bae75a4SStefan Roese  * Commands configuration
272bae75a4SStefan Roese  */
282bae75a4SStefan Roese #define CONFIG_SYS_NO_FLASH		/* Declare no flash (NOR/SPI) */
292bae75a4SStefan Roese #define CONFIG_CMD_CACHE
302bae75a4SStefan Roese #define CONFIG_CMD_DHCP
312bae75a4SStefan Roese #define CONFIG_CMD_ENV
32*e80f1e85SStefan Roese #define CONFIG_CMD_EXT2
33*e80f1e85SStefan Roese #define CONFIG_CMD_EXT4
34*e80f1e85SStefan Roese #define CONFIG_CMD_FAT
35*e80f1e85SStefan Roese #define CONFIG_CMD_FS_GENERIC
362bae75a4SStefan Roese #define CONFIG_CMD_I2C
37*e80f1e85SStefan Roese #define CONFIG_CMD_MMC
382bae75a4SStefan Roese #define CONFIG_CMD_PING
392bae75a4SStefan Roese #define CONFIG_CMD_SF
402bae75a4SStefan Roese #define CONFIG_CMD_SPI
412bae75a4SStefan Roese #define CONFIG_CMD_TFTPPUT
422bae75a4SStefan Roese #define CONFIG_CMD_TIME
432bae75a4SStefan Roese 
442bae75a4SStefan Roese /* I2C */
452bae75a4SStefan Roese #define CONFIG_SYS_I2C
462bae75a4SStefan Roese #define CONFIG_SYS_I2C_MVTWSI
472bae75a4SStefan Roese #define CONFIG_I2C_MVTWSI_BASE0		MVEBU_TWSI_BASE
482bae75a4SStefan Roese #define CONFIG_SYS_I2C_SLAVE		0x0
492bae75a4SStefan Roese #define CONFIG_SYS_I2C_SPEED		100000
502bae75a4SStefan Roese 
512bae75a4SStefan Roese /* SPI NOR flash default params, used by sf commands */
522bae75a4SStefan Roese #define CONFIG_SF_DEFAULT_SPEED		1000000
532bae75a4SStefan Roese #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
542bae75a4SStefan Roese #define CONFIG_SPI_FLASH_STMICRO
552bae75a4SStefan Roese 
56*e80f1e85SStefan Roese /*
57*e80f1e85SStefan Roese  * SDIO/MMC Card Configuration
58*e80f1e85SStefan Roese  */
59*e80f1e85SStefan Roese #define CONFIG_MMC
60*e80f1e85SStefan Roese #define CONFIG_MMC_SDMA
61*e80f1e85SStefan Roese #define CONFIG_GENERIC_MMC
62*e80f1e85SStefan Roese #define CONFIG_SDHCI
63*e80f1e85SStefan Roese #define CONFIG_MV_SDHCI
64*e80f1e85SStefan Roese #define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE
65*e80f1e85SStefan Roese 
66*e80f1e85SStefan Roese /* Partition support */
67*e80f1e85SStefan Roese #define CONFIG_DOS_PARTITION
68*e80f1e85SStefan Roese #define CONFIG_EFI_PARTITION
69*e80f1e85SStefan Roese 
70*e80f1e85SStefan Roese /* Additional FS support/configuration */
71*e80f1e85SStefan Roese #define CONFIG_SUPPORT_VFAT
72*e80f1e85SStefan Roese 
732bae75a4SStefan Roese /* Environment in SPI NOR flash */
742bae75a4SStefan Roese #define CONFIG_ENV_IS_IN_SPI_FLASH
752bae75a4SStefan Roese #define CONFIG_ENV_OFFSET		(1 << 20) /* 1MiB in */
762bae75a4SStefan Roese #define CONFIG_ENV_SIZE			(64 << 10) /* 64KiB */
772bae75a4SStefan Roese #define CONFIG_ENV_SECT_SIZE		(256 << 10) /* 256KiB sectors */
782bae75a4SStefan Roese 
792bae75a4SStefan Roese #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
802bae75a4SStefan Roese #define CONFIG_PHY_ADDR			{ 1, 0 }
812bae75a4SStefan Roese #define CONFIG_SYS_NETA_INTERFACE_TYPE	PHY_INTERFACE_MODE_RGMII
822bae75a4SStefan Roese #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
832bae75a4SStefan Roese 
842bae75a4SStefan Roese #define CONFIG_SYS_CONSOLE_INFO_QUIET	/* don't print console @ startup */
852bae75a4SStefan Roese #define CONFIG_SYS_ALT_MEMTEST
862bae75a4SStefan Roese 
873fd38af7SKevin Smith /* Keep device tree and initrd in lower memory so the kernel can access them */
883fd38af7SKevin Smith #define CONFIG_EXTRA_ENV_SETTINGS	\
893fd38af7SKevin Smith 	"fdt_high=0x10000000\0"		\
903fd38af7SKevin Smith 	"initrd_high=0x10000000\0"
913fd38af7SKevin Smith 
922bae75a4SStefan Roese /*
932bae75a4SStefan Roese  * mv-common.h should be defined after CMD configs since it used them
942bae75a4SStefan Roese  * to enable certain macros
952bae75a4SStefan Roese  */
962bae75a4SStefan Roese #include "mv-common.h"
972bae75a4SStefan Roese 
982bae75a4SStefan Roese #endif /* _CONFIG_DB_88F6820_GP_H */
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