12bae75a4SStefan Roese /* 22bae75a4SStefan Roese * Copyright (C) 2014 Stefan Roese <sr@denx.de> 32bae75a4SStefan Roese * 42bae75a4SStefan Roese * SPDX-License-Identifier: GPL-2.0+ 52bae75a4SStefan Roese */ 62bae75a4SStefan Roese 72bae75a4SStefan Roese #ifndef _CONFIG_DB_88F6820_GP_H 82bae75a4SStefan Roese #define _CONFIG_DB_88F6820_GP_H 92bae75a4SStefan Roese 102bae75a4SStefan Roese /* 112bae75a4SStefan Roese * High Level Configuration Options (easy to change) 122bae75a4SStefan Roese */ 132bae75a4SStefan Roese #define CONFIG_ARMADA_XP /* SOC Family Name */ 142bae75a4SStefan Roese #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ 152bae75a4SStefan Roese 162bae75a4SStefan Roese #define CONFIG_SYS_L2_PL310 172bae75a4SStefan Roese 182bae75a4SStefan Roese #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 192bae75a4SStefan Roese #define CONFIG_SYS_GENERIC_BOARD 202bae75a4SStefan Roese #define CONFIG_DISPLAY_BOARDINFO_LATE 212bae75a4SStefan Roese 222bae75a4SStefan Roese #define CONFIG_SYS_TEXT_BASE 0x04000000 232bae75a4SStefan Roese #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 242bae75a4SStefan Roese 252bae75a4SStefan Roese /* 262bae75a4SStefan Roese * Commands configuration 272bae75a4SStefan Roese */ 282bae75a4SStefan Roese #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ 292bae75a4SStefan Roese #define CONFIG_CMD_CACHE 302bae75a4SStefan Roese #define CONFIG_CMD_DHCP 312bae75a4SStefan Roese #define CONFIG_CMD_ENV 32e80f1e85SStefan Roese #define CONFIG_CMD_EXT2 33e80f1e85SStefan Roese #define CONFIG_CMD_EXT4 34e80f1e85SStefan Roese #define CONFIG_CMD_FAT 35e80f1e85SStefan Roese #define CONFIG_CMD_FS_GENERIC 362bae75a4SStefan Roese #define CONFIG_CMD_I2C 37e80f1e85SStefan Roese #define CONFIG_CMD_MMC 382bae75a4SStefan Roese #define CONFIG_CMD_PING 394d991cb3SStefan Roese #define CONFIG_CMD_SCSI 402bae75a4SStefan Roese #define CONFIG_CMD_SF 412bae75a4SStefan Roese #define CONFIG_CMD_SPI 422bae75a4SStefan Roese #define CONFIG_CMD_TFTPPUT 432bae75a4SStefan Roese #define CONFIG_CMD_TIME 44*59565736SStefan Roese #define CONFIG_CMD_USB 452bae75a4SStefan Roese 462bae75a4SStefan Roese /* I2C */ 472bae75a4SStefan Roese #define CONFIG_SYS_I2C 482bae75a4SStefan Roese #define CONFIG_SYS_I2C_MVTWSI 492bae75a4SStefan Roese #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 502bae75a4SStefan Roese #define CONFIG_SYS_I2C_SLAVE 0x0 512bae75a4SStefan Roese #define CONFIG_SYS_I2C_SPEED 100000 522bae75a4SStefan Roese 532bae75a4SStefan Roese /* SPI NOR flash default params, used by sf commands */ 542bae75a4SStefan Roese #define CONFIG_SF_DEFAULT_SPEED 1000000 552bae75a4SStefan Roese #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 562bae75a4SStefan Roese #define CONFIG_SPI_FLASH_STMICRO 572bae75a4SStefan Roese 58e80f1e85SStefan Roese /* 59e80f1e85SStefan Roese * SDIO/MMC Card Configuration 60e80f1e85SStefan Roese */ 61e80f1e85SStefan Roese #define CONFIG_MMC 62e80f1e85SStefan Roese #define CONFIG_MMC_SDMA 63e80f1e85SStefan Roese #define CONFIG_GENERIC_MMC 64e80f1e85SStefan Roese #define CONFIG_SDHCI 65e80f1e85SStefan Roese #define CONFIG_MV_SDHCI 66e80f1e85SStefan Roese #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE 67e80f1e85SStefan Roese 687cbaff95SStefan Roese /* 697cbaff95SStefan Roese * SATA/SCSI/AHCI configuration 707cbaff95SStefan Roese */ 717cbaff95SStefan Roese #define CONFIG_LIBATA 727cbaff95SStefan Roese #define CONFIG_SCSI_AHCI 737cbaff95SStefan Roese #define CONFIG_SCSI_AHCI_PLAT 747cbaff95SStefan Roese #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 757cbaff95SStefan Roese #define CONFIG_SYS_SCSI_MAX_LUN 1 767cbaff95SStefan Roese #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 777cbaff95SStefan Roese CONFIG_SYS_SCSI_MAX_LUN) 787cbaff95SStefan Roese 79e80f1e85SStefan Roese /* Partition support */ 80e80f1e85SStefan Roese #define CONFIG_DOS_PARTITION 81e80f1e85SStefan Roese #define CONFIG_EFI_PARTITION 82e80f1e85SStefan Roese 83e80f1e85SStefan Roese /* Additional FS support/configuration */ 84e80f1e85SStefan Roese #define CONFIG_SUPPORT_VFAT 85e80f1e85SStefan Roese 86*59565736SStefan Roese /* USB/EHCI configuration */ 87*59565736SStefan Roese #define CONFIG_USB_EHCI 88*59565736SStefan Roese #define CONFIG_USB_STORAGE 89*59565736SStefan Roese #define CONFIG_USB_EHCI_MARVELL 90*59565736SStefan Roese #define CONFIG_EHCI_IS_TDI 91*59565736SStefan Roese 922bae75a4SStefan Roese /* Environment in SPI NOR flash */ 932bae75a4SStefan Roese #define CONFIG_ENV_IS_IN_SPI_FLASH 942bae75a4SStefan Roese #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ 952bae75a4SStefan Roese #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 962bae75a4SStefan Roese #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ 972bae75a4SStefan Roese 982bae75a4SStefan Roese #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 992bae75a4SStefan Roese #define CONFIG_PHY_ADDR { 1, 0 } 1002bae75a4SStefan Roese #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 1012bae75a4SStefan Roese #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 1022bae75a4SStefan Roese 1032bae75a4SStefan Roese #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ 1042bae75a4SStefan Roese #define CONFIG_SYS_ALT_MEMTEST 1052bae75a4SStefan Roese 1063fd38af7SKevin Smith /* Keep device tree and initrd in lower memory so the kernel can access them */ 1073fd38af7SKevin Smith #define CONFIG_EXTRA_ENV_SETTINGS \ 1083fd38af7SKevin Smith "fdt_high=0x10000000\0" \ 1093fd38af7SKevin Smith "initrd_high=0x10000000\0" 1103fd38af7SKevin Smith 1112bae75a4SStefan Roese /* 1122bae75a4SStefan Roese * mv-common.h should be defined after CMD configs since it used them 1132bae75a4SStefan Roese * to enable certain macros 1142bae75a4SStefan Roese */ 1152bae75a4SStefan Roese #include "mv-common.h" 1162bae75a4SStefan Roese 1172bae75a4SStefan Roese #endif /* _CONFIG_DB_88F6820_GP_H */ 118