1*2bae75a4SStefan Roese /* 2*2bae75a4SStefan Roese * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3*2bae75a4SStefan Roese * 4*2bae75a4SStefan Roese * SPDX-License-Identifier: GPL-2.0+ 5*2bae75a4SStefan Roese */ 6*2bae75a4SStefan Roese 7*2bae75a4SStefan Roese #ifndef _CONFIG_DB_88F6820_GP_H 8*2bae75a4SStefan Roese #define _CONFIG_DB_88F6820_GP_H 9*2bae75a4SStefan Roese 10*2bae75a4SStefan Roese /* 11*2bae75a4SStefan Roese * High Level Configuration Options (easy to change) 12*2bae75a4SStefan Roese */ 13*2bae75a4SStefan Roese #define CONFIG_ARMADA_XP /* SOC Family Name */ 14*2bae75a4SStefan Roese #define CONFIG_DB_88F6820_GP /* Board target name for DDR training */ 15*2bae75a4SStefan Roese 16*2bae75a4SStefan Roese #define CONFIG_SYS_L2_PL310 17*2bae75a4SStefan Roese 18*2bae75a4SStefan Roese #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 19*2bae75a4SStefan Roese #define CONFIG_SYS_GENERIC_BOARD 20*2bae75a4SStefan Roese #define CONFIG_DISPLAY_BOARDINFO_LATE 21*2bae75a4SStefan Roese 22*2bae75a4SStefan Roese #define CONFIG_SYS_TEXT_BASE 0x04000000 23*2bae75a4SStefan Roese #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 24*2bae75a4SStefan Roese 25*2bae75a4SStefan Roese /* 26*2bae75a4SStefan Roese * Commands configuration 27*2bae75a4SStefan Roese */ 28*2bae75a4SStefan Roese #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ 29*2bae75a4SStefan Roese #include <config_cmd_default.h> 30*2bae75a4SStefan Roese #define CONFIG_CMD_CACHE 31*2bae75a4SStefan Roese #define CONFIG_CMD_DHCP 32*2bae75a4SStefan Roese #define CONFIG_CMD_ENV 33*2bae75a4SStefan Roese #define CONFIG_CMD_I2C 34*2bae75a4SStefan Roese #define CONFIG_CMD_PING 35*2bae75a4SStefan Roese #define CONFIG_CMD_SF 36*2bae75a4SStefan Roese #define CONFIG_CMD_SPI 37*2bae75a4SStefan Roese #define CONFIG_CMD_TFTPPUT 38*2bae75a4SStefan Roese #define CONFIG_CMD_TIME 39*2bae75a4SStefan Roese 40*2bae75a4SStefan Roese /* I2C */ 41*2bae75a4SStefan Roese #define CONFIG_SYS_I2C 42*2bae75a4SStefan Roese #define CONFIG_SYS_I2C_MVTWSI 43*2bae75a4SStefan Roese #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 44*2bae75a4SStefan Roese #define CONFIG_SYS_I2C_SLAVE 0x0 45*2bae75a4SStefan Roese #define CONFIG_SYS_I2C_SPEED 100000 46*2bae75a4SStefan Roese 47*2bae75a4SStefan Roese /* SPI NOR flash default params, used by sf commands */ 48*2bae75a4SStefan Roese #define CONFIG_SF_DEFAULT_SPEED 1000000 49*2bae75a4SStefan Roese #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 50*2bae75a4SStefan Roese #define CONFIG_SPI_FLASH_STMICRO 51*2bae75a4SStefan Roese 52*2bae75a4SStefan Roese /* Environment in SPI NOR flash */ 53*2bae75a4SStefan Roese #define CONFIG_ENV_IS_IN_SPI_FLASH 54*2bae75a4SStefan Roese #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ 55*2bae75a4SStefan Roese #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 56*2bae75a4SStefan Roese #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ 57*2bae75a4SStefan Roese 58*2bae75a4SStefan Roese #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 59*2bae75a4SStefan Roese #define CONFIG_PHY_ADDR { 1, 0 } 60*2bae75a4SStefan Roese #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 61*2bae75a4SStefan Roese #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 62*2bae75a4SStefan Roese 63*2bae75a4SStefan Roese #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ 64*2bae75a4SStefan Roese #define CONFIG_SYS_ALT_MEMTEST 65*2bae75a4SStefan Roese 66*2bae75a4SStefan Roese /* 67*2bae75a4SStefan Roese * mv-common.h should be defined after CMD configs since it used them 68*2bae75a4SStefan Roese * to enable certain macros 69*2bae75a4SStefan Roese */ 70*2bae75a4SStefan Roese #include "mv-common.h" 71*2bae75a4SStefan Roese 72*2bae75a4SStefan Roese #endif /* _CONFIG_DB_88F6820_GP_H */ 73