189b765c7SSudhakar Rajashekhara /* 289b765c7SSudhakar Rajashekhara * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 389b765c7SSudhakar Rajashekhara * 489b765c7SSudhakar Rajashekhara * Based on davinci_dvevm.h. Original Copyrights follow: 589b765c7SSudhakar Rajashekhara * 689b765c7SSudhakar Rajashekhara * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 789b765c7SSudhakar Rajashekhara * 889b765c7SSudhakar Rajashekhara * This program is free software; you can redistribute it and/or modify 989b765c7SSudhakar Rajashekhara * it under the terms of the GNU General Public License as published by 1089b765c7SSudhakar Rajashekhara * the Free Software Foundation; either version 2 of the License, or 1189b765c7SSudhakar Rajashekhara * (at your option) any later version. 1289b765c7SSudhakar Rajashekhara * 1389b765c7SSudhakar Rajashekhara * This program is distributed in the hope that it will be useful, 1489b765c7SSudhakar Rajashekhara * but WITHOUT ANY WARRANTY; without even the implied warranty of 1589b765c7SSudhakar Rajashekhara * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1689b765c7SSudhakar Rajashekhara * GNU General Public License for more details. 1789b765c7SSudhakar Rajashekhara * 1889b765c7SSudhakar Rajashekhara * You should have received a copy of the GNU General Public License 1989b765c7SSudhakar Rajashekhara * along with this program; if not, write to the Free Software 2089b765c7SSudhakar Rajashekhara * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 2189b765c7SSudhakar Rajashekhara */ 2289b765c7SSudhakar Rajashekhara 2389b765c7SSudhakar Rajashekhara #ifndef __CONFIG_H 2489b765c7SSudhakar Rajashekhara #define __CONFIG_H 2589b765c7SSudhakar Rajashekhara 2689b765c7SSudhakar Rajashekhara /* 2789b765c7SSudhakar Rajashekhara * Board 2889b765c7SSudhakar Rajashekhara */ 293d248d37SBen Gardiner #define CONFIG_DRIVER_TI_EMAC 30*d73a8a1bSStefano Babic #define CONFIG_USE_SPIFLASH 3189b765c7SSudhakar Rajashekhara 3289b765c7SSudhakar Rajashekhara /* 3389b765c7SSudhakar Rajashekhara * SoC Configuration 3489b765c7SSudhakar Rajashekhara */ 3589b765c7SSudhakar Rajashekhara #define CONFIG_MACH_DAVINCI_DA850_EVM 3689b765c7SSudhakar Rajashekhara #define CONFIG_ARM926EJS /* arm926ejs CPU core */ 3789b765c7SSudhakar Rajashekhara #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ 3889b765c7SSudhakar Rajashekhara #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) 3989b765c7SSudhakar Rajashekhara #define CONFIG_SYS_OSCIN_FREQ 24000000 4089b765c7SSudhakar Rajashekhara #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE 4189b765c7SSudhakar Rajashekhara #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) 4289b765c7SSudhakar Rajashekhara #define CONFIG_SYS_HZ 1000 4389b765c7SSudhakar Rajashekhara #define CONFIG_SKIP_LOWLEVEL_INIT 44f760d14aSSughosh Ganu #define CONFIG_SYS_TEXT_BASE 0xc1080000 4589b765c7SSudhakar Rajashekhara 4689b765c7SSudhakar Rajashekhara /* 4789b765c7SSudhakar Rajashekhara * Memory Info 4889b765c7SSudhakar Rajashekhara */ 4989b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ 5089b765c7SSudhakar Rajashekhara #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ 5189b765c7SSudhakar Rajashekhara #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ 5297003756SBen Gardiner #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ 5389b765c7SSudhakar Rajashekhara 5489b765c7SSudhakar Rajashekhara /* memtest start addr */ 5589b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) 5689b765c7SSudhakar Rajashekhara 5789b765c7SSudhakar Rajashekhara /* memtest will be run on 16MB */ 5889b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) 5989b765c7SSudhakar Rajashekhara 6089b765c7SSudhakar Rajashekhara #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 6189b765c7SSudhakar Rajashekhara #define CONFIG_STACKSIZE (256*1024) /* regular stack */ 6289b765c7SSudhakar Rajashekhara 6389b765c7SSudhakar Rajashekhara /* 6489b765c7SSudhakar Rajashekhara * Serial Driver info 6589b765c7SSudhakar Rajashekhara */ 6689b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550 6789b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_SERIAL 6889b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ 6989b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ 7089b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) 7189b765c7SSudhakar Rajashekhara #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ 7289b765c7SSudhakar Rajashekhara #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 7389b765c7SSudhakar Rajashekhara #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 7489b765c7SSudhakar Rajashekhara 75*d73a8a1bSStefano Babic #define CONFIG_SPI 76*d73a8a1bSStefano Babic #define CONFIG_SPI_FLASH 77*d73a8a1bSStefano Babic #define CONFIG_SPI_FLASH_STMICRO 78*d73a8a1bSStefano Babic #define CONFIG_DAVINCI_SPI 79*d73a8a1bSStefano Babic #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE 80*d73a8a1bSStefano Babic #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) 81*d73a8a1bSStefano Babic #define CONFIG_SF_DEFAULT_SPEED 30000000 82*d73a8a1bSStefano Babic #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 83*d73a8a1bSStefano Babic 8489b765c7SSudhakar Rajashekhara /* 8589b765c7SSudhakar Rajashekhara * I2C Configuration 8689b765c7SSudhakar Rajashekhara */ 8789b765c7SSudhakar Rajashekhara #define CONFIG_HARD_I2C 8889b765c7SSudhakar Rajashekhara #define CONFIG_DRIVER_DAVINCI_I2C 8989b765c7SSudhakar Rajashekhara #define CONFIG_SYS_I2C_SPEED 25000 9089b765c7SSudhakar Rajashekhara #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ 9189b765c7SSudhakar Rajashekhara 9289b765c7SSudhakar Rajashekhara /* 936b2c6468SBen Gardiner * Flash & Environment 946b2c6468SBen Gardiner */ 956b2c6468SBen Gardiner #ifdef CONFIG_USE_NAND 966b2c6468SBen Gardiner #undef CONFIG_ENV_IS_IN_FLASH 976b2c6468SBen Gardiner #define CONFIG_NAND_DAVINCI 986b2c6468SBen Gardiner #define CONFIG_SYS_NO_FLASH 996b2c6468SBen Gardiner #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ 1006b2c6468SBen Gardiner #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ 1016b2c6468SBen Gardiner #define CONFIG_ENV_SIZE (128 << 10) 1026b2c6468SBen Gardiner #define CONFIG_SYS_NAND_USE_FLASH_BBT 1036b2c6468SBen Gardiner #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST 1046b2c6468SBen Gardiner #define CONFIG_SYS_NAND_PAGE_2K 1056b2c6468SBen Gardiner #define CONFIG_SYS_NAND_CS 3 1066b2c6468SBen Gardiner #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 1076b2c6468SBen Gardiner #define CONFIG_SYS_CLE_MASK 0x10 1086b2c6468SBen Gardiner #define CONFIG_SYS_ALE_MASK 0x8 1096b2c6468SBen Gardiner #undef CONFIG_SYS_NAND_HW_ECC 1106b2c6468SBen Gardiner #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ 1116b2c6468SBen Gardiner #define NAND_MAX_CHIPS 1 1126b2c6468SBen Gardiner #endif 1136b2c6468SBen Gardiner 1146b2c6468SBen Gardiner /* 1153d248d37SBen Gardiner * Network & Ethernet Configuration 1163d248d37SBen Gardiner */ 1173d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC 1183d248d37SBen Gardiner #define CONFIG_EMAC_MDIO_PHY_NUM 0 1193d248d37SBen Gardiner #define CONFIG_MII 1203d248d37SBen Gardiner #define CONFIG_BOOTP_DEFAULT 1213d248d37SBen Gardiner #define CONFIG_BOOTP_DNS 1223d248d37SBen Gardiner #define CONFIG_BOOTP_DNS2 1233d248d37SBen Gardiner #define CONFIG_BOOTP_SEND_HOSTNAME 1243d248d37SBen Gardiner #define CONFIG_NET_RETRY_COUNT 10 1253d248d37SBen Gardiner #define CONFIG_NET_MULTI 1263d248d37SBen Gardiner #endif 1273d248d37SBen Gardiner 128*d73a8a1bSStefano Babic #ifdef CONFIG_USE_SPIFLASH 129*d73a8a1bSStefano Babic #undef CONFIG_ENV_IS_IN_FLASH 130*d73a8a1bSStefano Babic #undef CONFIG_ENV_IS_IN_NAND 131*d73a8a1bSStefano Babic #define CONFIG_ENV_IS_IN_SPI_FLASH 132*d73a8a1bSStefano Babic #define CONFIG_ENV_SIZE (64 << 10) 133*d73a8a1bSStefano Babic #define CONFIG_ENV_OFFSET (256 << 10) 134*d73a8a1bSStefano Babic #define CONFIG_ENV_SECT_SIZE (64 << 10) 135*d73a8a1bSStefano Babic #define CONFIG_SYS_NO_FLASH 136*d73a8a1bSStefano Babic #endif 137*d73a8a1bSStefano Babic 1383d248d37SBen Gardiner /* 13989b765c7SSudhakar Rajashekhara * U-Boot general configuration 14089b765c7SSudhakar Rajashekhara */ 14189b765c7SSudhakar Rajashekhara #define CONFIG_BOOTFILE "uImage" /* Boot file name */ 14289b765c7SSudhakar Rajashekhara #define CONFIG_SYS_PROMPT "DA850-evm > " /* Command Prompt */ 14389b765c7SSudhakar Rajashekhara #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 14489b765c7SSudhakar Rajashekhara #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 14589b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 14689b765c7SSudhakar Rajashekhara #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ 14789b765c7SSudhakar Rajashekhara #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) 14889b765c7SSudhakar Rajashekhara #define CONFIG_VERSION_VARIABLE 14989b765c7SSudhakar Rajashekhara #define CONFIG_AUTO_COMPLETE 15089b765c7SSudhakar Rajashekhara #define CONFIG_SYS_HUSH_PARSER 15189b765c7SSudhakar Rajashekhara #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 15289b765c7SSudhakar Rajashekhara #define CONFIG_CMDLINE_EDITING 15389b765c7SSudhakar Rajashekhara #define CONFIG_SYS_LONGHELP 15489b765c7SSudhakar Rajashekhara #define CONFIG_CRC32_VERIFY 15589b765c7SSudhakar Rajashekhara #define CONFIG_MX_CYCLIC 15689b765c7SSudhakar Rajashekhara 15789b765c7SSudhakar Rajashekhara /* 15889b765c7SSudhakar Rajashekhara * Linux Information 15989b765c7SSudhakar Rajashekhara */ 16059e0d611SBen Gardiner #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) 16189b765c7SSudhakar Rajashekhara #define CONFIG_CMDLINE_TAG 1624f6fc15bSSekhar Nori #define CONFIG_REVISION_TAG 16389b765c7SSudhakar Rajashekhara #define CONFIG_SETUP_MEMORY_TAGS 16489b765c7SSudhakar Rajashekhara #define CONFIG_BOOTARGS \ 16589b765c7SSudhakar Rajashekhara "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" 16689b765c7SSudhakar Rajashekhara #define CONFIG_BOOTDELAY 3 16789b765c7SSudhakar Rajashekhara 16889b765c7SSudhakar Rajashekhara /* 16989b765c7SSudhakar Rajashekhara * U-Boot commands 17089b765c7SSudhakar Rajashekhara */ 17189b765c7SSudhakar Rajashekhara #include <config_cmd_default.h> 17289b765c7SSudhakar Rajashekhara #define CONFIG_CMD_ENV 17389b765c7SSudhakar Rajashekhara #define CONFIG_CMD_ASKENV 17489b765c7SSudhakar Rajashekhara #define CONFIG_CMD_DHCP 17589b765c7SSudhakar Rajashekhara #define CONFIG_CMD_DIAG 17689b765c7SSudhakar Rajashekhara #define CONFIG_CMD_MII 17789b765c7SSudhakar Rajashekhara #define CONFIG_CMD_PING 17889b765c7SSudhakar Rajashekhara #define CONFIG_CMD_SAVES 17989b765c7SSudhakar Rajashekhara #define CONFIG_CMD_MEMORY 18089b765c7SSudhakar Rajashekhara 18189b765c7SSudhakar Rajashekhara #ifndef CONFIG_DRIVER_TI_EMAC 18289b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_NET 18389b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_DHCP 18489b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_MII 18589b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_PING 18689b765c7SSudhakar Rajashekhara #endif 18789b765c7SSudhakar Rajashekhara 1886b2c6468SBen Gardiner #ifdef CONFIG_USE_NAND 1896b2c6468SBen Gardiner #undef CONFIG_CMD_FLASH 1906b2c6468SBen Gardiner #undef CONFIG_CMD_IMLS 1916b2c6468SBen Gardiner #define CONFIG_CMD_NAND 192771d028aSBen Gardiner 193771d028aSBen Gardiner #define CONFIG_CMD_MTDPARTS 194771d028aSBen Gardiner #define CONFIG_MTD_DEVICE 195771d028aSBen Gardiner #define CONFIG_MTD_PARTITIONS 196771d028aSBen Gardiner #define CONFIG_LZO 197771d028aSBen Gardiner #define CONFIG_RBTREE 198771d028aSBen Gardiner #define CONFIG_CMD_UBI 199771d028aSBen Gardiner #define CONFIG_CMD_UBIFS 2006b2c6468SBen Gardiner #endif 2016b2c6468SBen Gardiner 202*d73a8a1bSStefano Babic #ifdef CONFIG_USE_SPIFLASH 203*d73a8a1bSStefano Babic #undef CONFIG_CMD_IMLS 204*d73a8a1bSStefano Babic #undef CONFIG_CMD_FLASH 205*d73a8a1bSStefano Babic #define CONFIG_CMD_SPI 206*d73a8a1bSStefano Babic #define CONFIG_CMD_SF 207*d73a8a1bSStefano Babic #define CONFIG_CMD_SAVEENV 208*d73a8a1bSStefano Babic #endif 209*d73a8a1bSStefano Babic 21089b765c7SSudhakar Rajashekhara #if !defined(CONFIG_USE_NAND) && \ 21189b765c7SSudhakar Rajashekhara !defined(CONFIG_USE_NOR) && \ 21289b765c7SSudhakar Rajashekhara !defined(CONFIG_USE_SPIFLASH) 21389b765c7SSudhakar Rajashekhara #define CONFIG_ENV_IS_NOWHERE 21489b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NO_FLASH 21589b765c7SSudhakar Rajashekhara #define CONFIG_ENV_SIZE (16 << 10) 21689b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_IMLS 21789b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_ENV 21889b765c7SSudhakar Rajashekhara #endif 21989b765c7SSudhakar Rajashekhara 220ab86f72cSHeiko Schocher /* additions for new relocation code, must added to all boards */ 221ab86f72cSHeiko Schocher #define CONFIG_SYS_SDRAM_BASE 0xc0000000 222ab86f72cSHeiko Schocher #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ 22325ddd1fbSWolfgang Denk GENERATED_GBL_DATA_SIZE) 22489b765c7SSudhakar Rajashekhara #endif /* __CONFIG_H */ 225