xref: /rk3399_rockchip-uboot/include/configs/da850evm.h (revision 4f6fc15b42776b12244af8aa28da42c8e6497742)
189b765c7SSudhakar Rajashekhara /*
289b765c7SSudhakar Rajashekhara  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
389b765c7SSudhakar Rajashekhara  *
489b765c7SSudhakar Rajashekhara  * Based on davinci_dvevm.h. Original Copyrights follow:
589b765c7SSudhakar Rajashekhara  *
689b765c7SSudhakar Rajashekhara  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
789b765c7SSudhakar Rajashekhara  *
889b765c7SSudhakar Rajashekhara  * This program is free software; you can redistribute it and/or modify
989b765c7SSudhakar Rajashekhara  * it under the terms of the GNU General Public License as published by
1089b765c7SSudhakar Rajashekhara  * the Free Software Foundation; either version 2 of the License, or
1189b765c7SSudhakar Rajashekhara  * (at your option) any later version.
1289b765c7SSudhakar Rajashekhara  *
1389b765c7SSudhakar Rajashekhara  * This program is distributed in the hope that it will be useful,
1489b765c7SSudhakar Rajashekhara  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1589b765c7SSudhakar Rajashekhara  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1689b765c7SSudhakar Rajashekhara  * GNU General Public License for more details.
1789b765c7SSudhakar Rajashekhara  *
1889b765c7SSudhakar Rajashekhara  * You should have received a copy of the GNU General Public License
1989b765c7SSudhakar Rajashekhara  * along with this program; if not, write to the Free Software
2089b765c7SSudhakar Rajashekhara  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
2189b765c7SSudhakar Rajashekhara  */
2289b765c7SSudhakar Rajashekhara 
2389b765c7SSudhakar Rajashekhara #ifndef __CONFIG_H
2489b765c7SSudhakar Rajashekhara #define __CONFIG_H
2589b765c7SSudhakar Rajashekhara 
2689b765c7SSudhakar Rajashekhara /*
2789b765c7SSudhakar Rajashekhara  * Board
2889b765c7SSudhakar Rajashekhara  */
293d248d37SBen Gardiner #define CONFIG_DRIVER_TI_EMAC
3089b765c7SSudhakar Rajashekhara 
3189b765c7SSudhakar Rajashekhara /*
3289b765c7SSudhakar Rajashekhara  * SoC Configuration
3389b765c7SSudhakar Rajashekhara  */
3489b765c7SSudhakar Rajashekhara #define CONFIG_MACH_DAVINCI_DA850_EVM
3589b765c7SSudhakar Rajashekhara #define CONFIG_ARM926EJS		/* arm926ejs CPU core */
3689b765c7SSudhakar Rajashekhara #define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
3789b765c7SSudhakar Rajashekhara #define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
3889b765c7SSudhakar Rajashekhara #define CONFIG_SYS_OSCIN_FREQ		24000000
3989b765c7SSudhakar Rajashekhara #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
4089b765c7SSudhakar Rajashekhara #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
4189b765c7SSudhakar Rajashekhara #define CONFIG_SYS_HZ			1000
4289b765c7SSudhakar Rajashekhara #define CONFIG_SKIP_LOWLEVEL_INIT
43f760d14aSSughosh Ganu #define CONFIG_SYS_TEXT_BASE		0xc1080000
4489b765c7SSudhakar Rajashekhara 
4589b765c7SSudhakar Rajashekhara /*
4689b765c7SSudhakar Rajashekhara  * Memory Info
4789b765c7SSudhakar Rajashekhara  */
4889b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MALLOC_LEN	(0x10000 + 1*1024*1024) /* malloc() len */
4989b765c7SSudhakar Rajashekhara #define PHYS_SDRAM_1		DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
5089b765c7SSudhakar Rajashekhara #define PHYS_SDRAM_1_SIZE	(64 << 20) /* SDRAM size 64MB */
5197003756SBen Gardiner #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
5289b765c7SSudhakar Rajashekhara 
5389b765c7SSudhakar Rajashekhara /* memtest start addr */
5489b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
5589b765c7SSudhakar Rajashekhara 
5689b765c7SSudhakar Rajashekhara /* memtest will be run on 16MB */
5789b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MEMTEST_END 	(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
5889b765c7SSudhakar Rajashekhara 
5989b765c7SSudhakar Rajashekhara #define CONFIG_NR_DRAM_BANKS	1 /* we have 1 bank of DRAM */
6089b765c7SSudhakar Rajashekhara #define CONFIG_STACKSIZE	(256*1024) /* regular stack */
6189b765c7SSudhakar Rajashekhara 
6289b765c7SSudhakar Rajashekhara /*
6389b765c7SSudhakar Rajashekhara  * Serial Driver info
6489b765c7SSudhakar Rajashekhara  */
6589b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550
6689b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_SERIAL
6789b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size */
6889b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_COM1	DAVINCI_UART2_BASE /* Base address of UART2 */
6989b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
7089b765c7SSudhakar Rajashekhara #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
7189b765c7SSudhakar Rajashekhara #define CONFIG_BAUDRATE		115200		/* Default baud rate */
7289b765c7SSudhakar Rajashekhara #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
7389b765c7SSudhakar Rajashekhara 
7489b765c7SSudhakar Rajashekhara /*
7589b765c7SSudhakar Rajashekhara  * I2C Configuration
7689b765c7SSudhakar Rajashekhara  */
7789b765c7SSudhakar Rajashekhara #define CONFIG_HARD_I2C
7889b765c7SSudhakar Rajashekhara #define CONFIG_DRIVER_DAVINCI_I2C
7989b765c7SSudhakar Rajashekhara #define CONFIG_SYS_I2C_SPEED		25000
8089b765c7SSudhakar Rajashekhara #define CONFIG_SYS_I2C_SLAVE		10 /* Bogus, master-only in U-Boot */
8189b765c7SSudhakar Rajashekhara 
8289b765c7SSudhakar Rajashekhara /*
836b2c6468SBen Gardiner  * Flash & Environment
846b2c6468SBen Gardiner  */
856b2c6468SBen Gardiner #ifdef CONFIG_USE_NAND
866b2c6468SBen Gardiner #undef CONFIG_ENV_IS_IN_FLASH
876b2c6468SBen Gardiner #define CONFIG_NAND_DAVINCI
886b2c6468SBen Gardiner #define CONFIG_SYS_NO_FLASH
896b2c6468SBen Gardiner #define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
906b2c6468SBen Gardiner #define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
916b2c6468SBen Gardiner #define CONFIG_ENV_SIZE			(128 << 10)
926b2c6468SBen Gardiner #define	CONFIG_SYS_NAND_USE_FLASH_BBT
936b2c6468SBen Gardiner #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
946b2c6468SBen Gardiner #define	CONFIG_SYS_NAND_PAGE_2K
956b2c6468SBen Gardiner #define CONFIG_SYS_NAND_CS		3
966b2c6468SBen Gardiner #define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
976b2c6468SBen Gardiner #define CONFIG_SYS_CLE_MASK		0x10
986b2c6468SBen Gardiner #define CONFIG_SYS_ALE_MASK		0x8
996b2c6468SBen Gardiner #undef CONFIG_SYS_NAND_HW_ECC
1006b2c6468SBen Gardiner #define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */
1016b2c6468SBen Gardiner #define NAND_MAX_CHIPS			1
1026b2c6468SBen Gardiner #define DEF_BOOTM			""
1036b2c6468SBen Gardiner #endif
1046b2c6468SBen Gardiner 
1056b2c6468SBen Gardiner /*
1063d248d37SBen Gardiner  * Network & Ethernet Configuration
1073d248d37SBen Gardiner  */
1083d248d37SBen Gardiner #ifdef CONFIG_DRIVER_TI_EMAC
1093d248d37SBen Gardiner #define CONFIG_EMAC_MDIO_PHY_NUM	0
1103d248d37SBen Gardiner #define CONFIG_MII
1113d248d37SBen Gardiner #define CONFIG_BOOTP_DEFAULT
1123d248d37SBen Gardiner #define CONFIG_BOOTP_DNS
1133d248d37SBen Gardiner #define CONFIG_BOOTP_DNS2
1143d248d37SBen Gardiner #define CONFIG_BOOTP_SEND_HOSTNAME
1153d248d37SBen Gardiner #define CONFIG_NET_RETRY_COUNT	10
1163d248d37SBen Gardiner #define CONFIG_NET_MULTI
1173d248d37SBen Gardiner #endif
1183d248d37SBen Gardiner 
1193d248d37SBen Gardiner /*
12089b765c7SSudhakar Rajashekhara  * U-Boot general configuration
12189b765c7SSudhakar Rajashekhara  */
12289b765c7SSudhakar Rajashekhara #define CONFIG_BOOTFILE		"uImage" /* Boot file name */
12389b765c7SSudhakar Rajashekhara #define CONFIG_SYS_PROMPT	"DA850-evm > " /* Command Prompt */
12489b765c7SSudhakar Rajashekhara #define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
12589b765c7SSudhakar Rajashekhara #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
12689b765c7SSudhakar Rajashekhara #define CONFIG_SYS_MAXARGS	16 /* max number of command args */
12789b765c7SSudhakar Rajashekhara #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
12889b765c7SSudhakar Rajashekhara #define CONFIG_SYS_LOAD_ADDR	(PHYS_SDRAM_1 + 0x700000)
12989b765c7SSudhakar Rajashekhara #define CONFIG_VERSION_VARIABLE
13089b765c7SSudhakar Rajashekhara #define CONFIG_AUTO_COMPLETE
13189b765c7SSudhakar Rajashekhara #define CONFIG_SYS_HUSH_PARSER
13289b765c7SSudhakar Rajashekhara #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
13389b765c7SSudhakar Rajashekhara #define CONFIG_CMDLINE_EDITING
13489b765c7SSudhakar Rajashekhara #define CONFIG_SYS_LONGHELP
13589b765c7SSudhakar Rajashekhara #define CONFIG_CRC32_VERIFY
13689b765c7SSudhakar Rajashekhara #define CONFIG_MX_CYCLIC
13789b765c7SSudhakar Rajashekhara 
13889b765c7SSudhakar Rajashekhara /*
13989b765c7SSudhakar Rajashekhara  * Linux Information
14089b765c7SSudhakar Rajashekhara  */
14159e0d611SBen Gardiner #define LINUX_BOOT_PARAM_ADDR	(PHYS_SDRAM_1 + 0x100)
14289b765c7SSudhakar Rajashekhara #define CONFIG_CMDLINE_TAG
143*4f6fc15bSSekhar Nori #define CONFIG_REVISION_TAG
14489b765c7SSudhakar Rajashekhara #define CONFIG_SETUP_MEMORY_TAGS
14589b765c7SSudhakar Rajashekhara #define CONFIG_BOOTARGS		\
14689b765c7SSudhakar Rajashekhara 	"mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
14789b765c7SSudhakar Rajashekhara #define CONFIG_BOOTDELAY	3
14889b765c7SSudhakar Rajashekhara 
14989b765c7SSudhakar Rajashekhara /*
15089b765c7SSudhakar Rajashekhara  * U-Boot commands
15189b765c7SSudhakar Rajashekhara  */
15289b765c7SSudhakar Rajashekhara #include <config_cmd_default.h>
15389b765c7SSudhakar Rajashekhara #define CONFIG_CMD_ENV
15489b765c7SSudhakar Rajashekhara #define CONFIG_CMD_ASKENV
15589b765c7SSudhakar Rajashekhara #define CONFIG_CMD_DHCP
15689b765c7SSudhakar Rajashekhara #define CONFIG_CMD_DIAG
15789b765c7SSudhakar Rajashekhara #define CONFIG_CMD_MII
15889b765c7SSudhakar Rajashekhara #define CONFIG_CMD_PING
15989b765c7SSudhakar Rajashekhara #define CONFIG_CMD_SAVES
16089b765c7SSudhakar Rajashekhara #define CONFIG_CMD_MEMORY
16189b765c7SSudhakar Rajashekhara 
16289b765c7SSudhakar Rajashekhara #ifndef CONFIG_DRIVER_TI_EMAC
16389b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_NET
16489b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_DHCP
16589b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_MII
16689b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_PING
16789b765c7SSudhakar Rajashekhara #endif
16889b765c7SSudhakar Rajashekhara 
1696b2c6468SBen Gardiner #ifdef CONFIG_USE_NAND
1706b2c6468SBen Gardiner #undef CONFIG_CMD_FLASH
1716b2c6468SBen Gardiner #undef CONFIG_CMD_IMLS
1726b2c6468SBen Gardiner #define CONFIG_CMD_NAND
173771d028aSBen Gardiner 
174771d028aSBen Gardiner #define CONFIG_CMD_MTDPARTS
175771d028aSBen Gardiner #define CONFIG_MTD_DEVICE
176771d028aSBen Gardiner #define CONFIG_MTD_PARTITIONS
177771d028aSBen Gardiner #define CONFIG_LZO
178771d028aSBen Gardiner #define CONFIG_RBTREE
179771d028aSBen Gardiner #define CONFIG_CMD_UBI
180771d028aSBen Gardiner #define CONFIG_CMD_UBIFS
1816b2c6468SBen Gardiner #endif
1826b2c6468SBen Gardiner 
18389b765c7SSudhakar Rajashekhara #if !defined(CONFIG_USE_NAND) && \
18489b765c7SSudhakar Rajashekhara 	!defined(CONFIG_USE_NOR) && \
18589b765c7SSudhakar Rajashekhara 	!defined(CONFIG_USE_SPIFLASH)
18689b765c7SSudhakar Rajashekhara #define CONFIG_ENV_IS_NOWHERE
18789b765c7SSudhakar Rajashekhara #define CONFIG_SYS_NO_FLASH
18889b765c7SSudhakar Rajashekhara #define CONFIG_ENV_SIZE		(16 << 10)
18989b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_IMLS
19089b765c7SSudhakar Rajashekhara #undef CONFIG_CMD_ENV
19189b765c7SSudhakar Rajashekhara #endif
19289b765c7SSudhakar Rajashekhara 
193ab86f72cSHeiko Schocher /* additions for new relocation code, must added to all boards */
194ab86f72cSHeiko Schocher #define CONFIG_SYS_SDRAM_BASE		0xc0000000
195ab86f72cSHeiko Schocher #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
19625ddd1fbSWolfgang Denk 					GENERATED_GBL_DATA_SIZE)
19789b765c7SSudhakar Rajashekhara #endif /* __CONFIG_H */
198