xref: /rk3399_rockchip-uboot/include/configs/crownbay.h (revision afbf1404c13deca6bbbc4d037e27ddde6150acd8)
1405d8205SBin Meng /*
2405d8205SBin Meng  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3405d8205SBin Meng  *
4405d8205SBin Meng  * SPDX-License-Identifier:	GPL-2.0+
5405d8205SBin Meng  */
6405d8205SBin Meng 
7405d8205SBin Meng /*
8405d8205SBin Meng  * board/config.h - configuration options, board specific
9405d8205SBin Meng  */
10405d8205SBin Meng 
11405d8205SBin Meng #ifndef __CONFIG_H
12405d8205SBin Meng #define __CONFIG_H
13405d8205SBin Meng 
14405d8205SBin Meng #include <configs/x86-common.h>
15405d8205SBin Meng 
16405d8205SBin Meng #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
17405d8205SBin Meng #define CONFIG_BOARD_EARLY_INIT_F
18*afbf1404SBin Meng #define CONFIG_ARCH_MISC_INIT
19405d8205SBin Meng 
20405d8205SBin Meng #define CONFIG_NR_DRAM_BANKS		1
21405d8205SBin Meng 
2241702bacSBin Meng #define CONFIG_X86_SERIAL
23405d8205SBin Meng #define CONFIG_SMSC_LPC47M
24405d8205SBin Meng 
25405d8205SBin Meng #define CONFIG_PCI_MEM_BUS		0x40000000
26405d8205SBin Meng #define CONFIG_PCI_MEM_PHYS		CONFIG_PCI_MEM_BUS
27405d8205SBin Meng #define CONFIG_PCI_MEM_SIZE		0x80000000
28405d8205SBin Meng 
29405d8205SBin Meng #define CONFIG_PCI_PREF_BUS		0xc0000000
30405d8205SBin Meng #define CONFIG_PCI_PREF_PHYS		CONFIG_PCI_PREF_BUS
31405d8205SBin Meng #define CONFIG_PCI_PREF_SIZE		0x20000000
32405d8205SBin Meng 
33405d8205SBin Meng #define CONFIG_PCI_IO_BUS		0x2000
34405d8205SBin Meng #define CONFIG_PCI_IO_PHYS		CONFIG_PCI_IO_BUS
35405d8205SBin Meng #define CONFIG_PCI_IO_SIZE		0xe000
36405d8205SBin Meng 
37405d8205SBin Meng #define CONFIG_SYS_EARLY_PCI_INIT
38405d8205SBin Meng #define CONFIG_PCI_PNP
390ff65eb9SBin Meng #define CONFIG_E1000
40405d8205SBin Meng 
41405d8205SBin Meng #define CONFIG_STD_DEVICES_SETTINGS     "stdin=serial\0" \
42405d8205SBin Meng 					"stdout=serial\0" \
43405d8205SBin Meng 					"stderr=serial\0"
44405d8205SBin Meng 
45405d8205SBin Meng #define CONFIG_SCSI_DEV_LIST            \
46405d8205SBin Meng 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
47405d8205SBin Meng 
48adfe3b24SBin Meng #define CONFIG_SPI_FLASH_SST
49adfe3b24SBin Meng 
50aada6276SBin Meng #define CONFIG_MMC
51aada6276SBin Meng #define CONFIG_SDHCI
52aada6276SBin Meng #define CONFIG_GENERIC_MMC
53aada6276SBin Meng #define CONFIG_MMC_SDMA
54aada6276SBin Meng #define CONFIG_CMD_MMC
55aada6276SBin Meng 
56a84134f7SBin Meng /* Topcliff Gigabit Ethernet */
57a84134f7SBin Meng #define CONFIG_PCH_GBE
58a84134f7SBin Meng #define CONFIG_PHYLIB
59a84134f7SBin Meng 
60405d8205SBin Meng /* Video is not supported */
61405d8205SBin Meng #undef CONFIG_VIDEO
62405d8205SBin Meng #undef CONFIG_CFB_CONSOLE
63405d8205SBin Meng 
64fba02d69SBin Meng /* Environment configuration */
65fba02d69SBin Meng #define CONFIG_ENV_SECT_SIZE		0x1000
66fba02d69SBin Meng #define CONFIG_ENV_OFFSET		0
67fba02d69SBin Meng 
68405d8205SBin Meng #endif	/* __CONFIG_H */
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