xref: /rk3399_rockchip-uboot/include/configs/crownbay.h (revision 7aaff9bf81b17b7920826f99a17eae7659292f5c)
1405d8205SBin Meng /*
2405d8205SBin Meng  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3405d8205SBin Meng  *
4405d8205SBin Meng  * SPDX-License-Identifier:	GPL-2.0+
5405d8205SBin Meng  */
6405d8205SBin Meng 
7405d8205SBin Meng /*
8405d8205SBin Meng  * board/config.h - configuration options, board specific
9405d8205SBin Meng  */
10405d8205SBin Meng 
11405d8205SBin Meng #ifndef __CONFIG_H
12405d8205SBin Meng #define __CONFIG_H
13405d8205SBin Meng 
14405d8205SBin Meng #include <configs/x86-common.h>
15405d8205SBin Meng 
16405d8205SBin Meng #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
17405d8205SBin Meng #define CONFIG_BOARD_EARLY_INIT_F
18afbf1404SBin Meng #define CONFIG_ARCH_MISC_INIT
19405d8205SBin Meng 
2041702bacSBin Meng #define CONFIG_X86_SERIAL
21405d8205SBin Meng #define CONFIG_SMSC_LPC47M
22405d8205SBin Meng 
23405d8205SBin Meng #define CONFIG_PCI_MEM_BUS		0x40000000
24405d8205SBin Meng #define CONFIG_PCI_MEM_PHYS		CONFIG_PCI_MEM_BUS
25405d8205SBin Meng #define CONFIG_PCI_MEM_SIZE		0x80000000
26405d8205SBin Meng 
27405d8205SBin Meng #define CONFIG_PCI_PREF_BUS		0xc0000000
28405d8205SBin Meng #define CONFIG_PCI_PREF_PHYS		CONFIG_PCI_PREF_BUS
29405d8205SBin Meng #define CONFIG_PCI_PREF_SIZE		0x20000000
30405d8205SBin Meng 
31405d8205SBin Meng #define CONFIG_PCI_IO_BUS		0x2000
32405d8205SBin Meng #define CONFIG_PCI_IO_PHYS		CONFIG_PCI_IO_BUS
33405d8205SBin Meng #define CONFIG_PCI_IO_SIZE		0xe000
34405d8205SBin Meng 
35*7aaff9bfSBin Meng #define CONFIG_PCI_CONFIG_HOST_BRIDGE
36405d8205SBin Meng #define CONFIG_SYS_EARLY_PCI_INIT
37405d8205SBin Meng #define CONFIG_PCI_PNP
380ff65eb9SBin Meng #define CONFIG_E1000
39405d8205SBin Meng 
40*7aaff9bfSBin Meng #define CONFIG_STD_DEVICES_SETTINGS	"stdin=serial,vga,usbkbd\0" \
41*7aaff9bfSBin Meng 					"stdout=serial,vga\0" \
42*7aaff9bfSBin Meng 					"stderr=serial,vga\0"
43405d8205SBin Meng 
44405d8205SBin Meng #define CONFIG_SCSI_DEV_LIST		\
45405d8205SBin Meng 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
46405d8205SBin Meng 
47adfe3b24SBin Meng #define CONFIG_SPI_FLASH_SST
48adfe3b24SBin Meng 
49aada6276SBin Meng #define CONFIG_MMC
50aada6276SBin Meng #define CONFIG_SDHCI
51aada6276SBin Meng #define CONFIG_GENERIC_MMC
52aada6276SBin Meng #define CONFIG_MMC_SDMA
53aada6276SBin Meng #define CONFIG_CMD_MMC
54aada6276SBin Meng 
55a84134f7SBin Meng /* Topcliff Gigabit Ethernet */
56a84134f7SBin Meng #define CONFIG_PCH_GBE
57a84134f7SBin Meng #define CONFIG_PHYLIB
58a84134f7SBin Meng 
59*7aaff9bfSBin Meng /* TunnelCreek IGD support */
60*7aaff9bfSBin Meng #define CONFIG_VGA_AS_SINGLE_DEVICE
61405d8205SBin Meng 
62fba02d69SBin Meng /* Environment configuration */
63fba02d69SBin Meng #define CONFIG_ENV_SECT_SIZE		0x1000
64fba02d69SBin Meng #define CONFIG_ENV_OFFSET		0
65fba02d69SBin Meng 
66405d8205SBin Meng #endif	/* __CONFIG_H */
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