1 /* 2 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _CONFIG_CONTROLCENTERDC_H 9 #define _CONFIG_CONTROLCENTERDC_H 10 11 /* 12 * High Level Configuration Options (easy to change) 13 */ 14 #define CONFIG_CUSTOMER_BOARD_SUPPORT 15 16 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 17 #define CONFIG_DISPLAY_BOARDINFO_LATE 18 #define CONFIG_BOARD_LATE_INIT 19 #define CONFIG_LAST_STAGE_INIT 20 21 /* 22 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 23 * for DDR ECC byte filling in the SPL before loading the main 24 * U-Boot into it. 25 */ 26 #define CONFIG_SYS_TEXT_BASE 0x00800000 27 28 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 29 30 #define CONFIG_LOADADDR 1000000 31 32 /* 33 * Commands configuration 34 */ 35 #define CONFIG_CMD_I2C 36 #define CONFIG_CMD_SCSI 37 #define CONFIG_CMD_SPI 38 39 /* SPI NOR flash default params, used by sf commands */ 40 #define CONFIG_SF_DEFAULT_BUS 1 41 #define CONFIG_SF_DEFAULT_SPEED 1000000 42 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 43 44 /* 45 * SDIO/MMC Card Configuration 46 */ 47 #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE 48 49 /* 50 * SATA/SCSI/AHCI configuration 51 */ 52 #define CONFIG_LIBATA 53 #define CONFIG_SCSI_AHCI 54 #define CONFIG_SCSI_AHCI_PLAT 55 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 56 #define CONFIG_SYS_SCSI_MAX_LUN 1 57 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 58 CONFIG_SYS_SCSI_MAX_LUN) 59 60 /* Additional FS support/configuration */ 61 #define CONFIG_SUPPORT_VFAT 62 63 /* USB/EHCI configuration */ 64 #define CONFIG_EHCI_IS_TDI 65 66 /* Environment in SPI NOR flash */ 67 #define CONFIG_ENV_SPI_BUS 1 68 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ 69 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 70 #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ 71 72 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 73 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 74 75 /* PCIe support */ 76 #ifndef CONFIG_SPL_BUILD 77 #define CONFIG_PCI 78 #define CONFIG_PCI_MVEBU 79 #define CONFIG_PCI_PNP 80 #define CONFIG_PCI_SCAN_SHOW 81 #endif 82 83 #define CONFIG_SYS_ALT_MEMTEST 84 85 /* 86 * Software (bit-bang) MII driver configuration 87 */ 88 #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ 89 #define CONFIG_BITBANGMII_MULTI 90 91 /* SPL */ 92 /* 93 * Select the boot device here 94 * 95 * Currently supported are: 96 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash 97 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) 98 */ 99 #define SPL_BOOT_SPI_NOR_FLASH 1 100 #define SPL_BOOT_SDIO_MMC_CARD 2 101 #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH 102 103 /* Defines for SPL */ 104 #define CONFIG_SPL_FRAMEWORK 105 #define CONFIG_SPL_SIZE (160 << 10) 106 107 #if defined(CONFIG_SECURED_MODE_IMAGE) 108 #define CONFIG_SPL_TEXT_BASE 0x40002614 109 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614) 110 #else 111 #define CONFIG_SPL_TEXT_BASE 0x40000030 112 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30) 113 #endif 114 115 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) 116 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 117 118 #ifdef CONFIG_SPL_BUILD 119 #define CONFIG_SYS_MALLOC_SIMPLE 120 #endif 121 122 #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) 123 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 124 125 #define CONFIG_SPL_LIBCOMMON_SUPPORT 126 #define CONFIG_SPL_LIBGENERIC_SUPPORT 127 #define CONFIG_SPL_SERIAL_SUPPORT 128 #define CONFIG_SPL_I2C_SUPPORT 129 130 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH 131 /* SPL related SPI defines */ 132 #define CONFIG_SPL_SPI_LOAD 133 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000 134 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS 135 #endif 136 137 #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD 138 /* SPL related MMC defines */ 139 #define CONFIG_SPL_MMC_SUPPORT 140 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 141 #define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10) 142 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS 143 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) 144 #ifdef CONFIG_SPL_BUILD 145 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ 146 #endif 147 #endif 148 149 /* 150 * Environment Configuration 151 */ 152 #define CONFIG_ENV_OVERWRITE 153 154 #define CONFIG_BAUDRATE 115200 155 156 #define CONFIG_HOSTNAME ccdc 157 #define CONFIG_ROOTPATH "/opt/nfsroot" 158 #define CONFIG_BOOTFILE "ccdc.img" 159 160 #define CONFIG_PREBOOT /* enable preboot variable */ 161 162 #define CONFIG_EXTRA_ENV_SETTINGS \ 163 "netdev=eth1\0" \ 164 "consoledev=ttyS1\0" \ 165 "u-boot=u-boot.bin\0" \ 166 "bootfile_addr=1000000\0" \ 167 "keyprogram_addr=3000000\0" \ 168 "keyprogram_file=keyprogram.img\0" \ 169 "fdtfile=controlcenterdc.dtb\0" \ 170 "load=tftpboot ${loadaddr} ${u-boot}\0" \ 171 "mmcdev=0:2\0" \ 172 "update=sf probe 1:0;" \ 173 " sf erase 0 +${filesize};" \ 174 " sf write ${fileaddr} 0 ${filesize}\0" \ 175 "upd=run load update\0" \ 176 "fdt_high=0x10000000\0" \ 177 "initrd_high=0x10000000\0" \ 178 "loadkeyprogram=tpm flush_keys;" \ 179 " mmc rescan;" \ 180 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\ 181 " source ${keyprogram_addr}:script@1\0" \ 182 "gpio1=gpio@22_25\0" \ 183 "gpio2=A29\0" \ 184 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \ 185 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \ 186 "bootfail=for i in ${blinkseq}; do" \ 187 " if test $i -eq 0; then" \ 188 " gpio clear ${gpio1}; gpio set ${gpio2};" \ 189 " elif test $i -eq 1; then" \ 190 " gpio clear ${gpio1}; gpio clear ${gpio2};" \ 191 " elif test $i -eq 2; then" \ 192 " gpio set ${gpio1}; gpio set ${gpio2};" \ 193 " else;" \ 194 " gpio clear ${gpio1}; gpio set ${gpio2};" \ 195 " fi; sleep 0.12; done\0" 196 197 #define CONFIG_NFSBOOTCOMMAND \ 198 "setenv bootargs root=/dev/nfs rw " \ 199 "nfsroot=${serverip}:${rootpath} " \ 200 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \ 201 "console=${consoledev},${baudrate} ${othbootargs}; " \ 202 "tftpboot ${bootfile_addr} ${bootfile}; " \ 203 "bootm ${bootfile_addr}" 204 205 #define CONFIG_MMCBOOTCOMMAND \ 206 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \ 207 "console=${consoledev},${baudrate} ${othbootargs}; " \ 208 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \ 209 "bootm ${bootfile_addr}" 210 211 #define CONFIG_BOOTCOMMAND \ 212 "if env exists keyprogram; then;" \ 213 " setenv keyprogram; run nfsboot;" \ 214 " fi;" \ 215 " run dobootfail" 216 217 /* 218 * mv-common.h should be defined after CMD configs since it used them 219 * to enable certain macros 220 */ 221 #include "mv-common.h" 222 223 #endif /* _CONFIG_CONTROLCENTERDC_H */ 224