1 /* 2 * (C) Copyright 2013 CompuLab, Ltd. 3 * Author: Igor Grinberg <grinberg@compulab.co.il> 4 * 5 * Configuration settings for the CompuLab CM-T3517 board 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_OMAP /* in a TI OMAP core */ 17 #define CONFIG_CM_T3517 /* working with CM-T3517 */ 18 #define CONFIG_OMAP_COMMON 19 /* Common ARM Erratas */ 20 #define CONFIG_ARM_ERRATA_454179 21 #define CONFIG_ARM_ERRATA_430973 22 #define CONFIG_ARM_ERRATA_621766 23 24 #define CONFIG_SYS_TEXT_BASE 0x80008000 25 26 /* 27 * This is needed for the DMA stuff. 28 * Although the default iss 64, we still define it 29 * to be on the safe side once the default is changed. 30 */ 31 32 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 33 34 #include <asm/arch/cpu.h> /* get chip and board defs */ 35 #include <asm/arch/omap.h> 36 37 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517 38 39 /* 40 * Display CPU and Board information 41 */ 42 #define CONFIG_DISPLAY_BOARDINFO 43 44 /* Clock Defines */ 45 #define V_OSCK 26000000 /* Clock output from T2 */ 46 #define V_SCLK (V_OSCK >> 1) 47 48 #define CONFIG_MISC_INIT_R 49 50 /* 51 * The early kernel mapping on ARM currently only maps from the base of DRAM 52 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 53 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 54 * so that leaves DRAM base to DRAM base + 0x4000 available. 55 */ 56 #define CONFIG_SYS_BOOTMAPSZ 0x4000 57 58 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 59 #define CONFIG_SETUP_MEMORY_TAGS 60 #define CONFIG_INITRD_TAG 61 #define CONFIG_REVISION_TAG 62 #define CONFIG_SERIAL_TAG 63 64 /* 65 * Size of malloc() pool 66 */ 67 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 69 70 /* 71 * Hardware drivers 72 */ 73 74 /* 75 * NS16550 Configuration 76 */ 77 #define CONFIG_SYS_NS16550_SERIAL 78 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 79 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 80 81 /* 82 * select serial console configuration 83 */ 84 #define CONFIG_CONS_INDEX 3 85 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 86 #define CONFIG_SERIAL3 3 /* UART3 */ 87 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 88 89 /* allow to overwrite serial and ethaddr */ 90 #define CONFIG_ENV_OVERWRITE 91 #define CONFIG_BAUDRATE 115200 92 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 93 115200} 94 95 #define CONFIG_OMAP_GPIO 96 97 #define CONFIG_GENERIC_MMC 98 #define CONFIG_MMC 99 #define CONFIG_OMAP_HSMMC 100 #define CONFIG_DOS_PARTITION 101 102 /* USB */ 103 #define CONFIG_USB_MUSB_AM35X 104 105 #ifndef CONFIG_USB_MUSB_AM35X 106 #define CONFIG_USB_OMAP3 107 #define CONFIG_USB_EHCI 108 #define CONFIG_USB_EHCI_OMAP 109 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146 110 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147 111 #else /* !CONFIG_USB_MUSB_AM35X */ 112 #define CONFIG_USB_MUSB_PIO_ONLY 113 #endif /* CONFIG_USB_MUSB_AM35X */ 114 115 /* commands to include */ 116 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 117 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 118 #define CONFIG_MTD_PARTITIONS 119 #define MTDIDS_DEFAULT "nand0=nand" 120 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 121 "1920k(u-boot),256k(u-boot-env),"\ 122 "4m(kernel),-(fs)" 123 124 #define CONFIG_CMD_NAND /* NAND support */ 125 126 #define CONFIG_SYS_NO_FLASH 127 #define CONFIG_SYS_I2C 128 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 129 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 130 #define CONFIG_SYS_I2C_OMAP34XX 131 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 132 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 133 #define CONFIG_SYS_I2C_EEPROM_BUS 0 134 #define CONFIG_I2C_MULTI_BUS 135 136 /* 137 * Board NAND Info. 138 */ 139 #define CONFIG_NAND_OMAP_GPMC 140 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 141 /* to access nand */ 142 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 143 /* to access nand at */ 144 /* CS0 */ 145 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 146 /* devices */ 147 148 /* Environment information */ 149 #define CONFIG_EXTRA_ENV_SETTINGS \ 150 "loadaddr=0x82000000\0" \ 151 "baudrate=115200\0" \ 152 "console=ttyO2,115200n8\0" \ 153 "netretry=yes\0" \ 154 "mpurate=auto\0" \ 155 "vram=12M\0" \ 156 "dvimode=1024x768MR-16@60\0" \ 157 "defaultdisplay=dvi\0" \ 158 "mmcdev=0\0" \ 159 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 160 "mmcrootfstype=ext4\0" \ 161 "nandroot=/dev/mtdblock4 rw\0" \ 162 "nandrootfstype=ubifs\0" \ 163 "mmcargs=setenv bootargs console=${console} " \ 164 "mpurate=${mpurate} " \ 165 "vram=${vram} " \ 166 "omapfb.mode=dvi:${dvimode} " \ 167 "omapdss.def_disp=${defaultdisplay} " \ 168 "root=${mmcroot} " \ 169 "rootfstype=${mmcrootfstype}\0" \ 170 "nandargs=setenv bootargs console=${console} " \ 171 "mpurate=${mpurate} " \ 172 "vram=${vram} " \ 173 "omapfb.mode=dvi:${dvimode} " \ 174 "omapdss.def_disp=${defaultdisplay} " \ 175 "root=${nandroot} " \ 176 "rootfstype=${nandrootfstype}\0" \ 177 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 178 "bootscript=echo Running bootscript from mmc ...; " \ 179 "source ${loadaddr}\0" \ 180 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 181 "mmcboot=echo Booting from mmc ...; " \ 182 "run mmcargs; " \ 183 "bootm ${loadaddr}\0" \ 184 "nandboot=echo Booting from nand ...; " \ 185 "run nandargs; " \ 186 "nand read ${loadaddr} 2a0000 400000; " \ 187 "bootm ${loadaddr}\0" \ 188 189 #define CONFIG_BOOTCOMMAND \ 190 "mmc dev ${mmcdev}; if mmc rescan; then " \ 191 "if run loadbootscript; then " \ 192 "run bootscript; " \ 193 "else " \ 194 "if run loaduimage; then " \ 195 "run mmcboot; " \ 196 "else run nandboot; " \ 197 "fi; " \ 198 "fi; " \ 199 "else run nandboot; fi" 200 201 /* 202 * Miscellaneous configurable options 203 */ 204 #define CONFIG_AUTO_COMPLETE 205 #define CONFIG_CMDLINE_EDITING 206 #define CONFIG_TIMESTAMP 207 #define CONFIG_SYS_AUTOLOAD "no" 208 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 209 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 210 /* Print Buffer Size */ 211 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 212 sizeof(CONFIG_SYS_PROMPT) + 16) 213 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 214 /* Boot Argument Buffer Size */ 215 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 216 217 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 218 219 /* 220 * AM3517 has 12 GP timers, they can be driven by the system clock 221 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 222 * This rate is divided by a local divisor. 223 */ 224 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 225 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 226 #define CONFIG_SYS_HZ 1000 227 228 /*----------------------------------------------------------------------- 229 * Physical Memory Map 230 */ 231 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ 232 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 233 #define CONFIG_SYS_CS0_SIZE (256 << 20) 234 235 /*----------------------------------------------------------------------- 236 * FLASH and environment organization 237 */ 238 239 /* **** PISMO SUPPORT *** */ 240 /* Monitor at start of flash */ 241 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 242 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 243 244 #define CONFIG_ENV_IS_IN_NAND 245 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 246 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 247 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 248 249 #if defined(CONFIG_CMD_NET) 250 #define CONFIG_DRIVER_TI_EMAC 251 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 252 #define CONFIG_MII 253 #define CONFIG_SMC911X 254 #define CONFIG_SMC911X_32_BIT 255 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20)) 256 #define CONFIG_ARP_TIMEOUT 200UL 257 #define CONFIG_NET_RETRY_COUNT 5 258 #endif /* CONFIG_CMD_NET */ 259 260 /* additions for new relocation code, must be added to all boards */ 261 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 262 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 263 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 264 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 265 CONFIG_SYS_INIT_RAM_SIZE - \ 266 GENERATED_GBL_DATA_SIZE) 267 268 /* Status LED */ 269 #define CONFIG_STATUS_LED /* Status LED enabled */ 270 #define CONFIG_BOARD_SPECIFIC_LED 271 #define CONFIG_GPIO_LED 272 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ 273 #define GREEN_LED_DEV 0 274 #define STATUS_LED_BIT GREEN_LED_GPIO 275 #define STATUS_LED_STATE STATUS_LED_ON 276 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 277 #define STATUS_LED_BOOT GREEN_LED_DEV 278 279 /* GPIO banks */ 280 #ifdef CONFIG_STATUS_LED 281 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ 282 #endif 283 284 /* Display Configuration */ 285 #define CONFIG_OMAP3_GPIO_2 286 #define CONFIG_OMAP3_GPIO_5 287 #define CONFIG_VIDEO_OMAP3 288 #define LCD_BPP LCD_COLOR16 289 290 #define CONFIG_LCD 291 #define CONFIG_SPLASH_SCREEN 292 #define CONFIG_SPLASHIMAGE_GUARD 293 #define CONFIG_CMD_BMP 294 #define CONFIG_BMP_16BPP 295 #define CONFIG_SCF0403_LCD 296 297 #define CONFIG_OMAP3_SPI 298 299 /* EEPROM */ 300 #define CONFIG_CMD_EEPROM 301 #define CONFIG_ENV_EEPROM_IS_ON_I2C 302 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 303 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 304 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 305 #define CONFIG_SYS_EEPROM_SIZE 256 306 307 #define CONFIG_CMD_EEPROM_LAYOUT 308 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3" 309 310 #endif /* __CONFIG_H */ 311