1*b09bf723SIgor Grinberg /* 2*b09bf723SIgor Grinberg * (C) Copyright 2013 CompuLab, Ltd. 3*b09bf723SIgor Grinberg * Author: Igor Grinberg <grinberg@compulab.co.il> 4*b09bf723SIgor Grinberg * 5*b09bf723SIgor Grinberg * Configuration settings for the CompuLab CM-T3517 board 6*b09bf723SIgor Grinberg * 7*b09bf723SIgor Grinberg * SPDX-License-Identifier: GPL-2.0+ 8*b09bf723SIgor Grinberg */ 9*b09bf723SIgor Grinberg 10*b09bf723SIgor Grinberg #ifndef __CONFIG_H 11*b09bf723SIgor Grinberg #define __CONFIG_H 12*b09bf723SIgor Grinberg 13*b09bf723SIgor Grinberg /* 14*b09bf723SIgor Grinberg * High Level Configuration Options 15*b09bf723SIgor Grinberg */ 16*b09bf723SIgor Grinberg #define CONFIG_OMAP /* in a TI OMAP core */ 17*b09bf723SIgor Grinberg #define CONFIG_CM_T3517 /* working with CM-T3517 */ 18*b09bf723SIgor Grinberg #define CONFIG_OMAP_COMMON 19*b09bf723SIgor Grinberg #define CONFIG_SYS_GENERIC_BOARD 20*b09bf723SIgor Grinberg 21*b09bf723SIgor Grinberg #define CONFIG_SYS_TEXT_BASE 0x80008000 22*b09bf723SIgor Grinberg 23*b09bf723SIgor Grinberg /* 24*b09bf723SIgor Grinberg * This is needed for the DMA stuff. 25*b09bf723SIgor Grinberg * Although the default iss 64, we still define it 26*b09bf723SIgor Grinberg * to be on the safe side once the default is changed. 27*b09bf723SIgor Grinberg */ 28*b09bf723SIgor Grinberg #define CONFIG_SYS_CACHELINE_SIZE 64 29*b09bf723SIgor Grinberg 30*b09bf723SIgor Grinberg #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 31*b09bf723SIgor Grinberg 32*b09bf723SIgor Grinberg #include <asm/arch/cpu.h> /* get chip and board defs */ 33*b09bf723SIgor Grinberg #include <asm/arch/omap3.h> 34*b09bf723SIgor Grinberg 35*b09bf723SIgor Grinberg /* 36*b09bf723SIgor Grinberg * Display CPU and Board information 37*b09bf723SIgor Grinberg */ 38*b09bf723SIgor Grinberg #define CONFIG_DISPLAY_CPUINFO 39*b09bf723SIgor Grinberg #define CONFIG_DISPLAY_BOARDINFO 40*b09bf723SIgor Grinberg 41*b09bf723SIgor Grinberg /* Clock Defines */ 42*b09bf723SIgor Grinberg #define V_OSCK 26000000 /* Clock output from T2 */ 43*b09bf723SIgor Grinberg #define V_SCLK (V_OSCK >> 1) 44*b09bf723SIgor Grinberg 45*b09bf723SIgor Grinberg #define CONFIG_MISC_INIT_R 46*b09bf723SIgor Grinberg 47*b09bf723SIgor Grinberg #define CONFIG_OF_LIBFDT 48*b09bf723SIgor Grinberg /* 49*b09bf723SIgor Grinberg * The early kernel mapping on ARM currently only maps from the base of DRAM 50*b09bf723SIgor Grinberg * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. 51*b09bf723SIgor Grinberg * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, 52*b09bf723SIgor Grinberg * so that leaves DRAM base to DRAM base + 0x4000 available. 53*b09bf723SIgor Grinberg */ 54*b09bf723SIgor Grinberg #define CONFIG_SYS_BOOTMAPSZ 0x4000 55*b09bf723SIgor Grinberg 56*b09bf723SIgor Grinberg #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 57*b09bf723SIgor Grinberg #define CONFIG_SETUP_MEMORY_TAGS 58*b09bf723SIgor Grinberg #define CONFIG_INITRD_TAG 59*b09bf723SIgor Grinberg #define CONFIG_REVISION_TAG 60*b09bf723SIgor Grinberg #define CONFIG_SERIAL_TAG 61*b09bf723SIgor Grinberg 62*b09bf723SIgor Grinberg /* 63*b09bf723SIgor Grinberg * Size of malloc() pool 64*b09bf723SIgor Grinberg */ 65*b09bf723SIgor Grinberg #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 66*b09bf723SIgor Grinberg #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 67*b09bf723SIgor Grinberg 68*b09bf723SIgor Grinberg /* 69*b09bf723SIgor Grinberg * Hardware drivers 70*b09bf723SIgor Grinberg */ 71*b09bf723SIgor Grinberg 72*b09bf723SIgor Grinberg /* 73*b09bf723SIgor Grinberg * NS16550 Configuration 74*b09bf723SIgor Grinberg */ 75*b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550 76*b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_SERIAL 77*b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_REG_SIZE (-4) 78*b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 79*b09bf723SIgor Grinberg 80*b09bf723SIgor Grinberg /* 81*b09bf723SIgor Grinberg * select serial console configuration 82*b09bf723SIgor Grinberg */ 83*b09bf723SIgor Grinberg #define CONFIG_CONS_INDEX 3 84*b09bf723SIgor Grinberg #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 85*b09bf723SIgor Grinberg #define CONFIG_SERIAL3 3 /* UART3 */ 86*b09bf723SIgor Grinberg #define CONFIG_SYS_CONSOLE_IS_IN_ENV 87*b09bf723SIgor Grinberg 88*b09bf723SIgor Grinberg /* allow to overwrite serial and ethaddr */ 89*b09bf723SIgor Grinberg #define CONFIG_ENV_OVERWRITE 90*b09bf723SIgor Grinberg #define CONFIG_BAUDRATE 115200 91*b09bf723SIgor Grinberg #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 92*b09bf723SIgor Grinberg 115200} 93*b09bf723SIgor Grinberg 94*b09bf723SIgor Grinberg #define CONFIG_OMAP_GPIO 95*b09bf723SIgor Grinberg 96*b09bf723SIgor Grinberg #define CONFIG_GENERIC_MMC 97*b09bf723SIgor Grinberg #define CONFIG_MMC 98*b09bf723SIgor Grinberg #define CONFIG_OMAP_HSMMC 99*b09bf723SIgor Grinberg #define CONFIG_DOS_PARTITION 100*b09bf723SIgor Grinberg 101*b09bf723SIgor Grinberg /* commands to include */ 102*b09bf723SIgor Grinberg #include <config_cmd_default.h> 103*b09bf723SIgor Grinberg 104*b09bf723SIgor Grinberg #define CONFIG_CMD_CACHE 105*b09bf723SIgor Grinberg #define CONFIG_CMD_EXT2 /* EXT2 Support */ 106*b09bf723SIgor Grinberg #define CONFIG_CMD_FAT /* FAT support */ 107*b09bf723SIgor Grinberg #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 108*b09bf723SIgor Grinberg #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 109*b09bf723SIgor Grinberg #define CONFIG_MTD_PARTITIONS 110*b09bf723SIgor Grinberg #define MTDIDS_DEFAULT "nand0=nand" 111*b09bf723SIgor Grinberg #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ 112*b09bf723SIgor Grinberg "1920k(u-boot),256k(u-boot-env),"\ 113*b09bf723SIgor Grinberg "4m(kernel),-(fs)" 114*b09bf723SIgor Grinberg 115*b09bf723SIgor Grinberg #define CONFIG_CMD_I2C /* I2C serial bus support */ 116*b09bf723SIgor Grinberg #define CONFIG_CMD_MMC /* MMC support */ 117*b09bf723SIgor Grinberg #define CONFIG_CMD_NAND /* NAND support */ 118*b09bf723SIgor Grinberg #define CONFIG_CMD_GPIO 119*b09bf723SIgor Grinberg 120*b09bf723SIgor Grinberg #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 121*b09bf723SIgor Grinberg #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 122*b09bf723SIgor Grinberg #undef CONFIG_CMD_IMLS /* List all found images */ 123*b09bf723SIgor Grinberg 124*b09bf723SIgor Grinberg #define CONFIG_SYS_NO_FLASH 125*b09bf723SIgor Grinberg #define CONFIG_SYS_I2C 126*b09bf723SIgor Grinberg #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 127*b09bf723SIgor Grinberg #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 128*b09bf723SIgor Grinberg #define CONFIG_SYS_I2C_OMAP34XX 129*b09bf723SIgor Grinberg #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 130*b09bf723SIgor Grinberg #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 131*b09bf723SIgor Grinberg #define CONFIG_SYS_I2C_EEPROM_BUS 0 132*b09bf723SIgor Grinberg #define CONFIG_I2C_MULTI_BUS 133*b09bf723SIgor Grinberg 134*b09bf723SIgor Grinberg /* 135*b09bf723SIgor Grinberg * Board NAND Info. 136*b09bf723SIgor Grinberg */ 137*b09bf723SIgor Grinberg #define CONFIG_SYS_NAND_QUIET_TEST 138*b09bf723SIgor Grinberg #define CONFIG_NAND_OMAP_GPMC 139*b09bf723SIgor Grinberg #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 140*b09bf723SIgor Grinberg /* to access nand */ 141*b09bf723SIgor Grinberg #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 142*b09bf723SIgor Grinberg /* to access nand at */ 143*b09bf723SIgor Grinberg /* CS0 */ 144*b09bf723SIgor Grinberg #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 145*b09bf723SIgor Grinberg /* devices */ 146*b09bf723SIgor Grinberg 147*b09bf723SIgor Grinberg /* Environment information */ 148*b09bf723SIgor Grinberg #define CONFIG_BOOTDELAY 3 149*b09bf723SIgor Grinberg #define CONFIG_ZERO_BOOTDELAY_CHECK 150*b09bf723SIgor Grinberg 151*b09bf723SIgor Grinberg #define CONFIG_EXTRA_ENV_SETTINGS \ 152*b09bf723SIgor Grinberg "loadaddr=0x82000000\0" \ 153*b09bf723SIgor Grinberg "baudrate=115200\0" \ 154*b09bf723SIgor Grinberg "console=ttyO2,115200n8\0" \ 155*b09bf723SIgor Grinberg "mpurate=auto\0" \ 156*b09bf723SIgor Grinberg "vram=12M\0" \ 157*b09bf723SIgor Grinberg "dvimode=1024x768MR-16@60\0" \ 158*b09bf723SIgor Grinberg "defaultdisplay=dvi\0" \ 159*b09bf723SIgor Grinberg "mmcdev=0\0" \ 160*b09bf723SIgor Grinberg "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 161*b09bf723SIgor Grinberg "mmcrootfstype=ext4\0" \ 162*b09bf723SIgor Grinberg "nandroot=/dev/mtdblock4 rw\0" \ 163*b09bf723SIgor Grinberg "nandrootfstype=ubifs\0" \ 164*b09bf723SIgor Grinberg "mmcargs=setenv bootargs console=${console} " \ 165*b09bf723SIgor Grinberg "mpurate=${mpurate} " \ 166*b09bf723SIgor Grinberg "vram=${vram} " \ 167*b09bf723SIgor Grinberg "omapfb.mode=dvi:${dvimode} " \ 168*b09bf723SIgor Grinberg "omapdss.def_disp=${defaultdisplay} " \ 169*b09bf723SIgor Grinberg "root=${mmcroot} " \ 170*b09bf723SIgor Grinberg "rootfstype=${mmcrootfstype}\0" \ 171*b09bf723SIgor Grinberg "nandargs=setenv bootargs console=${console} " \ 172*b09bf723SIgor Grinberg "mpurate=${mpurate} " \ 173*b09bf723SIgor Grinberg "vram=${vram} " \ 174*b09bf723SIgor Grinberg "omapfb.mode=dvi:${dvimode} " \ 175*b09bf723SIgor Grinberg "omapdss.def_disp=${defaultdisplay} " \ 176*b09bf723SIgor Grinberg "root=${nandroot} " \ 177*b09bf723SIgor Grinberg "rootfstype=${nandrootfstype}\0" \ 178*b09bf723SIgor Grinberg "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 179*b09bf723SIgor Grinberg "bootscript=echo Running bootscript from mmc ...; " \ 180*b09bf723SIgor Grinberg "source ${loadaddr}\0" \ 181*b09bf723SIgor Grinberg "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 182*b09bf723SIgor Grinberg "mmcboot=echo Booting from mmc ...; " \ 183*b09bf723SIgor Grinberg "run mmcargs; " \ 184*b09bf723SIgor Grinberg "bootm ${loadaddr}\0" \ 185*b09bf723SIgor Grinberg "nandboot=echo Booting from nand ...; " \ 186*b09bf723SIgor Grinberg "run nandargs; " \ 187*b09bf723SIgor Grinberg "nand read ${loadaddr} 2a0000 400000; " \ 188*b09bf723SIgor Grinberg "bootm ${loadaddr}\0" \ 189*b09bf723SIgor Grinberg 190*b09bf723SIgor Grinberg #define CONFIG_CMD_BOOTZ 191*b09bf723SIgor Grinberg #define CONFIG_BOOTCOMMAND \ 192*b09bf723SIgor Grinberg "mmc dev ${mmcdev}; if mmc rescan; then " \ 193*b09bf723SIgor Grinberg "if run loadbootscript; then " \ 194*b09bf723SIgor Grinberg "run bootscript; " \ 195*b09bf723SIgor Grinberg "else " \ 196*b09bf723SIgor Grinberg "if run loaduimage; then " \ 197*b09bf723SIgor Grinberg "run mmcboot; " \ 198*b09bf723SIgor Grinberg "else run nandboot; " \ 199*b09bf723SIgor Grinberg "fi; " \ 200*b09bf723SIgor Grinberg "fi; " \ 201*b09bf723SIgor Grinberg "else run nandboot; fi" 202*b09bf723SIgor Grinberg 203*b09bf723SIgor Grinberg /* 204*b09bf723SIgor Grinberg * Miscellaneous configurable options 205*b09bf723SIgor Grinberg */ 206*b09bf723SIgor Grinberg #define CONFIG_AUTO_COMPLETE 207*b09bf723SIgor Grinberg #define CONFIG_CMDLINE_EDITING 208*b09bf723SIgor Grinberg #define CONFIG_TIMESTAMP 209*b09bf723SIgor Grinberg #define CONFIG_SYS_AUTOLOAD "no" 210*b09bf723SIgor Grinberg #define CONFIG_SYS_LONGHELP /* undef to save memory */ 211*b09bf723SIgor Grinberg #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 212*b09bf723SIgor Grinberg #define CONFIG_SYS_PROMPT "CM-T3517 # " 213*b09bf723SIgor Grinberg #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 214*b09bf723SIgor Grinberg /* Print Buffer Size */ 215*b09bf723SIgor Grinberg #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 216*b09bf723SIgor Grinberg sizeof(CONFIG_SYS_PROMPT) + 16) 217*b09bf723SIgor Grinberg #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 218*b09bf723SIgor Grinberg /* Boot Argument Buffer Size */ 219*b09bf723SIgor Grinberg #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 220*b09bf723SIgor Grinberg 221*b09bf723SIgor Grinberg #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 222*b09bf723SIgor Grinberg 223*b09bf723SIgor Grinberg /* 224*b09bf723SIgor Grinberg * AM3517 has 12 GP timers, they can be driven by the system clock 225*b09bf723SIgor Grinberg * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 226*b09bf723SIgor Grinberg * This rate is divided by a local divisor. 227*b09bf723SIgor Grinberg */ 228*b09bf723SIgor Grinberg #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 229*b09bf723SIgor Grinberg #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 230*b09bf723SIgor Grinberg #define CONFIG_SYS_HZ 1000 231*b09bf723SIgor Grinberg 232*b09bf723SIgor Grinberg /*----------------------------------------------------------------------- 233*b09bf723SIgor Grinberg * Physical Memory Map 234*b09bf723SIgor Grinberg */ 235*b09bf723SIgor Grinberg #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ 236*b09bf723SIgor Grinberg #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 237*b09bf723SIgor Grinberg #define CONFIG_SYS_CS0_SIZE (256 << 20) 238*b09bf723SIgor Grinberg 239*b09bf723SIgor Grinberg /*----------------------------------------------------------------------- 240*b09bf723SIgor Grinberg * FLASH and environment organization 241*b09bf723SIgor Grinberg */ 242*b09bf723SIgor Grinberg 243*b09bf723SIgor Grinberg /* **** PISMO SUPPORT *** */ 244*b09bf723SIgor Grinberg /* Monitor at start of flash */ 245*b09bf723SIgor Grinberg #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 246*b09bf723SIgor Grinberg #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 247*b09bf723SIgor Grinberg 248*b09bf723SIgor Grinberg #define CONFIG_ENV_IS_IN_NAND 249*b09bf723SIgor Grinberg #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 250*b09bf723SIgor Grinberg #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 251*b09bf723SIgor Grinberg #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 252*b09bf723SIgor Grinberg 253*b09bf723SIgor Grinberg /* additions for new relocation code, must be added to all boards */ 254*b09bf723SIgor Grinberg #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 255*b09bf723SIgor Grinberg #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 256*b09bf723SIgor Grinberg #define CONFIG_SYS_INIT_RAM_SIZE 0x800 257*b09bf723SIgor Grinberg #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 258*b09bf723SIgor Grinberg CONFIG_SYS_INIT_RAM_SIZE - \ 259*b09bf723SIgor Grinberg GENERATED_GBL_DATA_SIZE) 260*b09bf723SIgor Grinberg 261*b09bf723SIgor Grinberg /* Status LED */ 262*b09bf723SIgor Grinberg #define CONFIG_STATUS_LED /* Status LED enabled */ 263*b09bf723SIgor Grinberg #define CONFIG_BOARD_SPECIFIC_LED 264*b09bf723SIgor Grinberg #define CONFIG_GPIO_LED 265*b09bf723SIgor Grinberg #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ 266*b09bf723SIgor Grinberg #define GREEN_LED_DEV 0 267*b09bf723SIgor Grinberg #define STATUS_LED_BIT GREEN_LED_GPIO 268*b09bf723SIgor Grinberg #define STATUS_LED_STATE STATUS_LED_ON 269*b09bf723SIgor Grinberg #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 270*b09bf723SIgor Grinberg #define STATUS_LED_BOOT GREEN_LED_DEV 271*b09bf723SIgor Grinberg 272*b09bf723SIgor Grinberg /* GPIO banks */ 273*b09bf723SIgor Grinberg #ifdef CONFIG_STATUS_LED 274*b09bf723SIgor Grinberg #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ 275*b09bf723SIgor Grinberg #endif 276*b09bf723SIgor Grinberg 277*b09bf723SIgor Grinberg #endif /* __CONFIG_H */ 278