1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include <asm/arch/imx-regs.h> 15 #include <config_distro_defaults.h> 16 #include "mx6_common.h" 17 18 /* Machine config */ 19 #define CONFIG_MX6 20 #define CONFIG_SYS_LITTLE_ENDIAN 21 #define CONFIG_MACH_TYPE 4273 22 #define CONFIG_SYS_HZ 1000 23 24 /* Display information on boot */ 25 #define CONFIG_DISPLAY_CPUINFO 26 #define CONFIG_DISPLAY_BOARDINFO 27 #define CONFIG_TIMESTAMP 28 29 /* CMD */ 30 #include <config_cmd_default.h> 31 #define CONFIG_CMD_GREPENV 32 #undef CONFIG_CMD_FLASH 33 #undef CONFIG_CMD_LOADB 34 #undef CONFIG_CMD_LOADS 35 #undef CONFIG_CMD_XIMG 36 #undef CONFIG_CMD_FPGA 37 #undef CONFIG_CMD_IMLS 38 #undef CONFIG_CMD_NET 39 #undef CONFIG_CMD_NFS 40 41 /* MMC */ 42 #define CONFIG_MMC 43 #define CONFIG_CMD_MMC 44 #define CONFIG_GENERIC_MMC 45 #define CONFIG_FSL_ESDHC 46 #define CONFIG_FSL_USDHC 47 #define CONFIG_SYS_FSL_USDHC_NUM 3 48 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 49 50 /* RAM */ 51 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 52 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 53 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 54 #define CONFIG_NR_DRAM_BANKS 2 55 #define CONFIG_SYS_MEMTEST_START 0x10000000 56 #define CONFIG_SYS_MEMTEST_END 0x10010000 57 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 58 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 59 #define CONFIG_SYS_INIT_SP_OFFSET \ 60 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 61 #define CONFIG_SYS_INIT_SP_ADDR \ 62 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 63 64 /* Serial console */ 65 #define CONFIG_MXC_UART 66 #define CONFIG_MXC_UART_BASE UART4_BASE 67 #define CONFIG_BAUDRATE 115200 68 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 69 70 /* Shell */ 71 #define CONFIG_SYS_PROMPT "CM-FX6 # " 72 #define CONFIG_SYS_CBSIZE 1024 73 #define CONFIG_SYS_MAXARGS 16 74 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 75 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 76 sizeof(CONFIG_SYS_PROMPT) + 16) 77 78 /* SPI flash */ 79 #define CONFIG_SYS_NO_FLASH 80 #define CONFIG_CMD_SF 81 #define CONFIG_SF_DEFAULT_BUS 0 82 #define CONFIG_SF_DEFAULT_CS 0 83 #define CONFIG_SF_DEFAULT_SPEED 25000000 84 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 85 86 /* Environment */ 87 #define CONFIG_ENV_OVERWRITE 88 #define CONFIG_ENV_IS_IN_SPI_FLASH 89 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 90 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 91 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 92 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 93 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 94 #define CONFIG_ENV_SIZE (8 * 1024) 95 #define CONFIG_ENV_OFFSET (768 * 1024) 96 97 #define CONFIG_EXTRA_ENV_SETTINGS \ 98 "kernel=uImage-cm-fx6\0" \ 99 "autoload=no\0" \ 100 "loadaddr=0x10800000\0" \ 101 "fdtaddr=0x11000000\0" \ 102 "console=ttymxc3,115200\0" \ 103 "ethprime=FEC0\0" \ 104 "bootscr=boot.scr\0" \ 105 "bootm_low=18000000\0" \ 106 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 107 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 108 "fdtfile=cm-fx6.dtb\0" \ 109 "doboot=bootm ${loadaddr}\0" \ 110 "loadfdt=false\0" \ 111 "setboottypez=setenv kernel zImage-cm-fx6;" \ 112 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 113 "setenv loadfdt true;\0" \ 114 "setboottypem=setenv kernel uImage-cm-fx6;" \ 115 "setenv doboot bootm ${loadaddr};" \ 116 "setenv loadfdt false;\0"\ 117 "run_eboot=echo Starting EBOOT ...; "\ 118 "mmc dev ${mmcdev} && " \ 119 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 120 "mmcdev=2\0" \ 121 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 122 "loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \ 123 "mmcbootscript=echo Running bootscript from mmc ...; "\ 124 "source ${loadaddr}\0" \ 125 "mmcargs=setenv bootargs console=${console} " \ 126 "root=${mmcroot} " \ 127 "${video}\0" \ 128 "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \ 129 "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \ 130 "mmcboot=echo Booting from mmc ...; " \ 131 "run mmcargs; " \ 132 "run doboot\0" \ 133 "nandroot=/dev/mtdblock4 rw\0" \ 134 "nandrootfstype=ubifs\0" \ 135 "nandargs=setenv bootargs console=${console} " \ 136 "root=${nandroot} " \ 137 "rootfstype=${nandrootfstype} " \ 138 "${video}\0" \ 139 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 140 "nandboot=echo Booting from nand ...; " \ 141 "run nandargs; " \ 142 "nand read ${loadaddr} 0 780000; " \ 143 "if ${loadfdt}; then " \ 144 "run nandloadfdt;" \ 145 "fi; " \ 146 "run doboot\0" \ 147 "boot=mmc dev ${mmcdev}; " \ 148 "if mmc rescan; then " \ 149 "if run loadmmcbootscript; then " \ 150 "run mmcbootscript;" \ 151 "else " \ 152 "if run mmcloadkernel; then " \ 153 "if ${loadfdt}; then " \ 154 "run mmcloadfdt;" \ 155 "fi;" \ 156 "run mmcboot;" \ 157 "fi;" \ 158 "fi;" \ 159 "fi;" \ 160 "run nandboot\0" 161 162 #define CONFIG_BOOTCOMMAND \ 163 "run setboottypem; run boot" 164 165 /* SPI */ 166 #define CONFIG_SPI 167 #define CONFIG_MXC_SPI 168 #define CONFIG_SPI_FLASH 169 #define CONFIG_SPI_FLASH_ATMEL 170 #define CONFIG_SPI_FLASH_EON 171 #define CONFIG_SPI_FLASH_GIGADEVICE 172 #define CONFIG_SPI_FLASH_MACRONIX 173 #define CONFIG_SPI_FLASH_SPANSION 174 #define CONFIG_SPI_FLASH_STMICRO 175 #define CONFIG_SPI_FLASH_SST 176 #define CONFIG_SPI_FLASH_WINBOND 177 178 /* NAND */ 179 #ifndef CONFIG_SPL_BUILD 180 #define CONFIG_CMD_NAND 181 #define CONFIG_SYS_NAND_BASE 0x40000000 182 #define CONFIG_SYS_NAND_MAX_CHIPS 1 183 #define CONFIG_SYS_MAX_NAND_DEVICE 1 184 #define CONFIG_NAND_MXS 185 #define CONFIG_SYS_NAND_ONFI_DETECTION 186 /* APBH DMA is required for NAND support */ 187 #define CONFIG_APBH_DMA 188 #define CONFIG_APBH_DMA_BURST 189 #define CONFIG_APBH_DMA_BURST8 190 #endif 191 192 /* GPIO */ 193 #define CONFIG_MXC_GPIO 194 195 /* Boot */ 196 #define CONFIG_ZERO_BOOTDELAY_CHECK 197 #define CONFIG_LOADADDR 0x10800000 198 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 199 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 200 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 201 #define CONFIG_SETUP_MEMORY_TAGS 202 #define CONFIG_INITRD_TAG 203 204 /* misc */ 205 #define CONFIG_SYS_GENERIC_BOARD 206 #define CONFIG_STACKSIZE (128 * 1024) 207 #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) 208 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ 209 210 /* SPL */ 211 #include "imx6_spl.h" 212 #define CONFIG_SPL_BOARD_INIT 213 #define CONFIG_SPL_MMC_SUPPORT 214 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ 215 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) 216 #define CONFIG_SPL_SPI_SUPPORT 217 #define CONFIG_SPL_SPI_FLASH_SUPPORT 218 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 219 #define CONFIG_SPL_SPI_LOAD 220 221 #endif /* __CONFIG_CM_FX6_H */ 222