xref: /rk3399_rockchip-uboot/include/configs/cm_fx6.h (revision 757fe635df1c5fc9448db84e458482cf63f0fd21)
1 /*
2  * Config file for Compulab CM-FX6 board
3  *
4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5  *
6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __CONFIG_CM_FX6_H
12 #define __CONFIG_CM_FX6_H
13 
14 #include <asm/arch/imx-regs.h>
15 #include <config_distro_defaults.h>
16 #include "mx6_common.h"
17 
18 /* Machine config */
19 #define CONFIG_MX6
20 #define CONFIG_SYS_LITTLE_ENDIAN
21 #define CONFIG_MACH_TYPE		4273
22 
23 #ifndef CONFIG_SPL_BUILD
24 
25 #define CONFIG_CMD_GPIO
26 
27 #define CONFIG_SYS_MALLOC_F_LEN		(1 << 10)
28 #endif
29 
30 /* Display information on boot */
31 #define CONFIG_DISPLAY_CPUINFO
32 #define CONFIG_DISPLAY_BOARDINFO
33 #define CONFIG_TIMESTAMP
34 
35 /* CMD */
36 #include <config_cmd_default.h>
37 #define CONFIG_CMD_GREPENV
38 #undef CONFIG_CMD_FLASH
39 #undef CONFIG_CMD_LOADB
40 #undef CONFIG_CMD_LOADS
41 #undef CONFIG_CMD_XIMG
42 #undef CONFIG_CMD_FPGA
43 #undef CONFIG_CMD_IMLS
44 
45 /* MMC */
46 #define CONFIG_MMC
47 #define CONFIG_CMD_MMC
48 #define CONFIG_GENERIC_MMC
49 #define CONFIG_FSL_ESDHC
50 #define CONFIG_FSL_USDHC
51 #define CONFIG_SYS_FSL_USDHC_NUM	3
52 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
53 
54 /* RAM */
55 #define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
56 #define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
57 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
58 #define CONFIG_NR_DRAM_BANKS		2
59 #define CONFIG_SYS_MEMTEST_START	0x10000000
60 #define CONFIG_SYS_MEMTEST_END		0x10010000
61 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
62 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
63 #define CONFIG_SYS_INIT_SP_OFFSET \
64 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
65 #define CONFIG_SYS_INIT_SP_ADDR \
66 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
67 
68 /* Serial console */
69 #define CONFIG_MXC_UART
70 #define CONFIG_MXC_UART_BASE		UART4_BASE
71 #define CONFIG_BAUDRATE			115200
72 #define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
73 
74 /* Shell */
75 #define CONFIG_SYS_PROMPT	"CM-FX6 # "
76 #define CONFIG_SYS_CBSIZE	1024
77 #define CONFIG_SYS_MAXARGS	16
78 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
79 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
80 					sizeof(CONFIG_SYS_PROMPT) + 16)
81 
82 /* SPI flash */
83 #define CONFIG_SYS_NO_FLASH
84 #define CONFIG_CMD_SF
85 #define CONFIG_SF_DEFAULT_BUS		0
86 #define CONFIG_SF_DEFAULT_CS		0
87 #define CONFIG_SF_DEFAULT_SPEED		25000000
88 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
89 
90 /* Environment */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_ENV_IS_IN_SPI_FLASH
93 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
94 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
95 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
96 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
97 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
98 #define CONFIG_ENV_SIZE			(8 * 1024)
99 #define CONFIG_ENV_OFFSET		(768 * 1024)
100 
101 #define CONFIG_EXTRA_ENV_SETTINGS \
102 	"stdin=serial,usbkbd\0" \
103 	"stdout=serial,vga\0" \
104 	"stderr=serial,vga\0" \
105 	"panel=HDMI\0" \
106 	"autoload=no\0" \
107 	"kernel=uImage-cm-fx6\0" \
108 	"script=boot.scr\0" \
109 	"dtb=cm-fx6.dtb\0" \
110 	"bootm_low=18000000\0" \
111 	"loadaddr=0x10800000\0" \
112 	"fdtaddr=0x11000000\0" \
113 	"console=ttymxc3,115200\0" \
114 	"ethprime=FEC0\0" \
115 	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
116 	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
117 	"doboot=bootm ${loadaddr}\0" \
118 	"doloadfdt=false\0" \
119 	"setboottypez=setenv kernel zImage-cm-fx6;" \
120 		"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
121 		"setenv doloadfdt true;\0" \
122 	"setboottypem=setenv kernel uImage-cm-fx6;" \
123 		"setenv doboot bootm ${loadaddr};" \
124 		"setenv doloadfdt false;\0"\
125 	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
126 	"sataroot=/dev/sda2 rw rootwait\0" \
127 	"nandroot=/dev/mtdblock4 rw\0" \
128 	"nandrootfstype=ubifs\0" \
129 	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
130 		"${video}\0" \
131 	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
132 		"${video}\0" \
133 	"nandargs=setenv bootargs console=${console} " \
134 		"root=${nandroot} " \
135 		"rootfstype=${nandrootfstype} " \
136 		"${video}\0" \
137 	"nandboot=if run nandloadkernel; then " \
138 			"run nandloadfdt;" \
139 			"run setboottypem;" \
140 			"run storagebootcmd;" \
141 			"run setboottypez;" \
142 			"run storagebootcmd;" \
143 		"fi;\0" \
144 	"run_eboot=echo Starting EBOOT ...; "\
145 		"mmc dev 2 && " \
146 		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
147 	"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
148 	"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
149 	"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
150 	"bootscript=echo Running bootscript from ${storagetype} ...;" \
151 		   "source ${loadaddr};\0" \
152 	"nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
153 	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
154 	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
155 	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
156 	"setupnandboot=setenv storagetype nand;\0" \
157 	"setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
158 	"storagebootcmd=echo Booting from ${storagetype} ...;" \
159 			"run ${storagetype}args; run doboot;\0" \
160 	"trybootk=if run loadkernel; then " \
161 		"if ${doloadfdt}; then " \
162 			"run loadfdt;" \
163 		"fi;" \
164 		"run storagebootcmd;" \
165 		"fi;\0" \
166 	"trybootsmz=if run loadscript; then " \
167 			"run bootscript;" \
168 		"fi;" \
169 		"run setboottypem;" \
170 		"run trybootk;" \
171 		"run setboottypez;" \
172 		"run trybootk;\0"
173 
174 #define CONFIG_BOOTCOMMAND \
175 	"run setupmmcboot;" \
176 	"mmc dev ${storagedev};" \
177 	"if mmc rescan; then " \
178 		"run trybootsmz;" \
179 	"fi;" \
180 	"run setupusbboot;" \
181 	"if usb start; then "\
182 		"if run loadscript; then " \
183 			"run bootscript;" \
184 		"fi;" \
185 	"fi;" \
186 	"run setupsataboot;" \
187 	"if sata init; then " \
188 		"run trybootsmz;" \
189 	"fi;" \
190 	"run setupnandboot;" \
191 	"run nandboot;"
192 
193 #define CONFIG_PREBOOT		"usb start"
194 
195 /* SPI */
196 #define CONFIG_SPI
197 #define CONFIG_MXC_SPI
198 #define CONFIG_SPI_FLASH
199 #define CONFIG_SPI_FLASH_ATMEL
200 #define CONFIG_SPI_FLASH_EON
201 #define CONFIG_SPI_FLASH_GIGADEVICE
202 #define CONFIG_SPI_FLASH_MACRONIX
203 #define CONFIG_SPI_FLASH_SPANSION
204 #define CONFIG_SPI_FLASH_STMICRO
205 #define CONFIG_SPI_FLASH_SST
206 #define CONFIG_SPI_FLASH_WINBOND
207 
208 /* NAND */
209 #ifndef CONFIG_SPL_BUILD
210 #define CONFIG_CMD_NAND
211 #define CONFIG_SYS_NAND_BASE		0x40000000
212 #define CONFIG_SYS_NAND_MAX_CHIPS	1
213 #define CONFIG_SYS_MAX_NAND_DEVICE	1
214 #define CONFIG_NAND_MXS
215 #define CONFIG_SYS_NAND_ONFI_DETECTION
216 /* APBH DMA is required for NAND support */
217 #define CONFIG_APBH_DMA
218 #define CONFIG_APBH_DMA_BURST
219 #define CONFIG_APBH_DMA_BURST8
220 #endif
221 
222 /* Ethernet */
223 #define CONFIG_FEC_MXC
224 #define CONFIG_FEC_MXC_PHYADDR		0
225 #define CONFIG_FEC_XCV_TYPE		RGMII
226 #define IMX_FEC_BASE			ENET_BASE_ADDR
227 #define CONFIG_PHYLIB
228 #define CONFIG_PHY_ATHEROS
229 #define CONFIG_MII
230 #define CONFIG_ETHPRIME			"FEC0"
231 #define CONFIG_ARP_TIMEOUT		200UL
232 #define CONFIG_NET_RETRY_COUNT		5
233 
234 /* USB */
235 #define CONFIG_CMD_USB
236 #define CONFIG_USB_EHCI
237 #define CONFIG_USB_EHCI_MX6
238 #define CONFIG_USB_STORAGE
239 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
240 #define CONFIG_MXC_USB_FLAGS		0
241 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
242 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
243 #define CONFIG_USB_KEYBOARD
244 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
245 #define CONFIG_SYS_STDIO_DEREGISTER
246 
247 /* I2C */
248 #define CONFIG_CMD_I2C
249 #define CONFIG_SYS_I2C
250 #define CONFIG_SYS_I2C_MXC
251 #define CONFIG_SYS_I2C_SPEED		100000
252 #define CONFIG_SYS_MXC_I2C3_SPEED	400000
253 
254 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
255 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
256 #define CONFIG_SYS_I2C_EEPROM_BUS	2
257 
258 /* SATA */
259 #define CONFIG_CMD_SATA
260 #define CONFIG_SYS_SATA_MAX_DEVICE	1
261 #define CONFIG_LIBATA
262 #define CONFIG_LBA48
263 #define CONFIG_DWC_AHSATA
264 #define CONFIG_DWC_AHSATA_PORT_ID	0
265 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
266 
267 /* GPIO */
268 #define CONFIG_MXC_GPIO
269 
270 /* Boot */
271 #define CONFIG_ZERO_BOOTDELAY_CHECK
272 #define CONFIG_LOADADDR			0x10800000
273 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
274 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
275 #define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
276 #define CONFIG_SETUP_MEMORY_TAGS
277 #define CONFIG_INITRD_TAG
278 #define CONFIG_REVISION_TAG
279 #define CONFIG_SERIAL_TAG
280 
281 /* misc */
282 #define CONFIG_SYS_GENERIC_BOARD
283 #define CONFIG_STACKSIZE			(128 * 1024)
284 #define CONFIG_SYS_MALLOC_LEN			(10 * 1024 * 1024)
285 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	800 /* 400 KB */
286 #define CONFIG_OF_BOARD_SETUP
287 
288 /* SPL */
289 #include "imx6_spl.h"
290 #define CONFIG_SPL_BOARD_INIT
291 #define CONFIG_SPL_MMC_SUPPORT
292 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80 /* offset 64 kb */
293 #define CONFIG_SYS_MONITOR_LEN	(CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
294 #define CONFIG_SPL_SPI_SUPPORT
295 #define CONFIG_SPL_SPI_FLASH_SUPPORT
296 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
297 #define CONFIG_SPL_SPI_LOAD
298 
299 /* Display */
300 #define CONFIG_VIDEO
301 #define CONFIG_VIDEO_IPUV3
302 #define CONFIG_IPUV3_CLK          260000000
303 #define CONFIG_IMX_HDMI
304 #define CONFIG_IMX_VIDEO_SKIP
305 #define CONFIG_CFB_CONSOLE
306 #define CONFIG_VGA_AS_SINGLE_DEVICE
307 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
308 #define CONFIG_CONSOLE_MUX
309 #define CONFIG_VIDEO_SW_CURSOR
310 
311 #define CONFIG_SPLASH_SCREEN
312 #define CONFIG_SPLASH_SOURCE
313 #define CONFIG_CMD_BMP
314 #define CONFIG_VIDEO_BMP_RLE8
315 
316 #define CONFIG_VIDEO_LOGO
317 #define CONFIG_VIDEO_BMP_LOGO
318 
319 #endif	/* __CONFIG_CM_FX6_H */
320