1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 /* Machine config */ 17 #define CONFIG_SYS_LITTLE_ENDIAN 18 #define CONFIG_MACH_TYPE 4273 19 20 #ifndef CONFIG_SPL_BUILD 21 #define CONFIG_CMD_GPIO 22 #endif 23 24 /* CMD */ 25 #define CONFIG_CMD_GREPENV 26 #undef CONFIG_CMD_LOADB 27 #undef CONFIG_CMD_LOADS 28 #undef CONFIG_CMD_XIMG 29 #undef CONFIG_CMD_FPGA 30 31 /* MMC */ 32 #define CONFIG_MMC 33 #define CONFIG_CMD_MMC 34 #define CONFIG_GENERIC_MMC 35 #define CONFIG_FSL_ESDHC 36 #define CONFIG_FSL_USDHC 37 #define CONFIG_SYS_FSL_USDHC_NUM 3 38 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 39 40 /* RAM */ 41 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 42 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 43 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 44 #define CONFIG_NR_DRAM_BANKS 2 45 #define CONFIG_SYS_MEMTEST_START 0x10000000 46 #define CONFIG_SYS_MEMTEST_END 0x10010000 47 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 48 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 49 #define CONFIG_SYS_INIT_SP_OFFSET \ 50 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 51 #define CONFIG_SYS_INIT_SP_ADDR \ 52 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 53 54 /* Serial console */ 55 #define CONFIG_MXC_UART 56 #define CONFIG_MXC_UART_BASE UART4_BASE 57 #define CONFIG_BAUDRATE 115200 58 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 59 60 /* Shell */ 61 #define CONFIG_SYS_PROMPT "CM-FX6 # " 62 #define CONFIG_SYS_CBSIZE 1024 63 #define CONFIG_SYS_MAXARGS 16 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 65 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 66 sizeof(CONFIG_SYS_PROMPT) + 16) 67 68 /* SPI flash */ 69 #define CONFIG_CMD_SF 70 #define CONFIG_SF_DEFAULT_BUS 0 71 #define CONFIG_SF_DEFAULT_CS 0 72 #define CONFIG_SF_DEFAULT_SPEED 25000000 73 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 74 75 /* Environment */ 76 #define CONFIG_ENV_OVERWRITE 77 #define CONFIG_ENV_IS_IN_SPI_FLASH 78 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 79 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 80 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 81 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 82 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 83 #define CONFIG_ENV_SIZE (8 * 1024) 84 #define CONFIG_ENV_OFFSET (768 * 1024) 85 86 #define CONFIG_EXTRA_ENV_SETTINGS \ 87 "stdin=serial,usbkbd\0" \ 88 "stdout=serial,vga\0" \ 89 "stderr=serial,vga\0" \ 90 "panel=HDMI\0" \ 91 "autoload=no\0" \ 92 "kernel=uImage-cm-fx6\0" \ 93 "script=boot.scr\0" \ 94 "dtb=cm-fx6.dtb\0" \ 95 "bootm_low=18000000\0" \ 96 "loadaddr=0x10800000\0" \ 97 "fdtaddr=0x11000000\0" \ 98 "console=ttymxc3,115200\0" \ 99 "ethprime=FEC0\0" \ 100 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 101 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 102 "doboot=bootm ${loadaddr}\0" \ 103 "doloadfdt=false\0" \ 104 "setboottypez=setenv kernel zImage-cm-fx6;" \ 105 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 106 "setenv doloadfdt true;\0" \ 107 "setboottypem=setenv kernel uImage-cm-fx6;" \ 108 "setenv doboot bootm ${loadaddr};" \ 109 "setenv doloadfdt false;\0"\ 110 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 111 "sataroot=/dev/sda2 rw rootwait\0" \ 112 "nandroot=/dev/mtdblock4 rw\0" \ 113 "nandrootfstype=ubifs\0" \ 114 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 115 "${video}\0" \ 116 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 117 "${video}\0" \ 118 "nandargs=setenv bootargs console=${console} " \ 119 "root=${nandroot} " \ 120 "rootfstype=${nandrootfstype} " \ 121 "${video}\0" \ 122 "nandboot=if run nandloadkernel; then " \ 123 "run nandloadfdt;" \ 124 "run setboottypem;" \ 125 "run storagebootcmd;" \ 126 "run setboottypez;" \ 127 "run storagebootcmd;" \ 128 "fi;\0" \ 129 "run_eboot=echo Starting EBOOT ...; "\ 130 "mmc dev 2 && " \ 131 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 132 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 133 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 134 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 135 "bootscript=echo Running bootscript from ${storagetype} ...;" \ 136 "source ${loadaddr};\0" \ 137 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 138 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 139 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 140 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 141 "setupnandboot=setenv storagetype nand;\0" \ 142 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 143 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 144 "run ${storagetype}args; run doboot;\0" \ 145 "trybootk=if run loadkernel; then " \ 146 "if ${doloadfdt}; then " \ 147 "run loadfdt;" \ 148 "fi;" \ 149 "run storagebootcmd;" \ 150 "fi;\0" \ 151 "trybootsmz=if run loadscript; then " \ 152 "run bootscript;" \ 153 "fi;" \ 154 "run setboottypem;" \ 155 "run trybootk;" \ 156 "run setboottypez;" \ 157 "run trybootk;\0" 158 159 #define CONFIG_BOOTCOMMAND \ 160 "run setupmmcboot;" \ 161 "mmc dev ${storagedev};" \ 162 "if mmc rescan; then " \ 163 "run trybootsmz;" \ 164 "fi;" \ 165 "run setupusbboot;" \ 166 "if usb start; then "\ 167 "if run loadscript; then " \ 168 "run bootscript;" \ 169 "fi;" \ 170 "fi;" \ 171 "run setupsataboot;" \ 172 "if sata init; then " \ 173 "run trybootsmz;" \ 174 "fi;" \ 175 "run setupnandboot;" \ 176 "run nandboot;" 177 178 #define CONFIG_PREBOOT "usb start" 179 180 /* SPI */ 181 #define CONFIG_SPI 182 #define CONFIG_MXC_SPI 183 #define CONFIG_SPI_FLASH 184 #define CONFIG_SPI_FLASH_ATMEL 185 #define CONFIG_SPI_FLASH_EON 186 #define CONFIG_SPI_FLASH_GIGADEVICE 187 #define CONFIG_SPI_FLASH_MACRONIX 188 #define CONFIG_SPI_FLASH_SPANSION 189 #define CONFIG_SPI_FLASH_STMICRO 190 #define CONFIG_SPI_FLASH_SST 191 #define CONFIG_SPI_FLASH_WINBOND 192 193 /* NAND */ 194 #ifndef CONFIG_SPL_BUILD 195 #define CONFIG_CMD_NAND 196 #define CONFIG_SYS_NAND_BASE 0x40000000 197 #define CONFIG_SYS_NAND_MAX_CHIPS 1 198 #define CONFIG_SYS_MAX_NAND_DEVICE 1 199 #define CONFIG_NAND_MXS 200 #define CONFIG_SYS_NAND_ONFI_DETECTION 201 /* APBH DMA is required for NAND support */ 202 #define CONFIG_APBH_DMA 203 #define CONFIG_APBH_DMA_BURST 204 #define CONFIG_APBH_DMA_BURST8 205 #endif 206 207 /* Ethernet */ 208 #define CONFIG_FEC_MXC 209 #define CONFIG_FEC_MXC_PHYADDR 0 210 #define CONFIG_FEC_XCV_TYPE RGMII 211 #define IMX_FEC_BASE ENET_BASE_ADDR 212 #define CONFIG_PHYLIB 213 #define CONFIG_PHY_ATHEROS 214 #define CONFIG_MII 215 #define CONFIG_ETHPRIME "FEC0" 216 #define CONFIG_ARP_TIMEOUT 200UL 217 #define CONFIG_NET_RETRY_COUNT 5 218 219 /* USB */ 220 #define CONFIG_CMD_USB 221 #define CONFIG_USB_EHCI 222 #define CONFIG_USB_EHCI_MX6 223 #define CONFIG_USB_STORAGE 224 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 225 #define CONFIG_MXC_USB_FLAGS 0 226 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 227 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 228 #define CONFIG_USB_KEYBOARD 229 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 230 #define CONFIG_SYS_STDIO_DEREGISTER 231 232 /* I2C */ 233 #define CONFIG_CMD_I2C 234 #define CONFIG_SYS_I2C 235 #define CONFIG_SYS_I2C_MXC 236 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 237 #define CONFIG_SYS_I2C_SPEED 100000 238 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 239 240 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 241 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 242 #define CONFIG_SYS_I2C_EEPROM_BUS 2 243 244 /* SATA */ 245 #define CONFIG_CMD_SATA 246 #define CONFIG_SYS_SATA_MAX_DEVICE 1 247 #define CONFIG_LIBATA 248 #define CONFIG_LBA48 249 #define CONFIG_DWC_AHSATA 250 #define CONFIG_DWC_AHSATA_PORT_ID 0 251 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 252 253 /* GPIO */ 254 #define CONFIG_MXC_GPIO 255 256 /* Boot */ 257 #define CONFIG_ZERO_BOOTDELAY_CHECK 258 #define CONFIG_LOADADDR 0x10800000 259 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 260 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 261 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 262 #define CONFIG_SETUP_MEMORY_TAGS 263 #define CONFIG_INITRD_TAG 264 #define CONFIG_REVISION_TAG 265 #define CONFIG_SERIAL_TAG 266 267 /* misc */ 268 #define CONFIG_STACKSIZE (128 * 1024) 269 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 270 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ 271 #define CONFIG_OF_BOARD_SETUP 272 273 /* SPL */ 274 #include "imx6_spl.h" 275 #define CONFIG_SPL_BOARD_INIT 276 #define CONFIG_SPL_MMC_SUPPORT 277 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ 278 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) 279 #define CONFIG_SPL_SPI_SUPPORT 280 #define CONFIG_SPL_SPI_FLASH_SUPPORT 281 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 282 #define CONFIG_SPL_SPI_LOAD 283 284 /* Display */ 285 #define CONFIG_VIDEO 286 #define CONFIG_VIDEO_IPUV3 287 #define CONFIG_IPUV3_CLK 260000000 288 #define CONFIG_IMX_HDMI 289 #define CONFIG_IMX_VIDEO_SKIP 290 #define CONFIG_CFB_CONSOLE 291 #define CONFIG_VGA_AS_SINGLE_DEVICE 292 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 293 #define CONFIG_CONSOLE_MUX 294 #define CONFIG_VIDEO_SW_CURSOR 295 296 #define CONFIG_SPLASH_SCREEN 297 #define CONFIG_SPLASH_SOURCE 298 #define CONFIG_CMD_BMP 299 #define CONFIG_VIDEO_BMP_RLE8 300 301 #define CONFIG_VIDEO_LOGO 302 #define CONFIG_VIDEO_BMP_LOGO 303 304 #endif /* __CONFIG_CM_FX6_H */ 305