1 /* 2 * Config file for Compulab CM-FX6 board 3 * 4 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Nikita Kiryanov <nikita@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_CM_FX6_H 12 #define __CONFIG_CM_FX6_H 13 14 #include "mx6_common.h" 15 16 /* Machine config */ 17 #define CONFIG_SYS_LITTLE_ENDIAN 18 #define CONFIG_MACH_TYPE 4273 19 20 /* CMD */ 21 #define CONFIG_CMD_GREPENV 22 #undef CONFIG_CMD_LOADB 23 #undef CONFIG_CMD_LOADS 24 #undef CONFIG_CMD_XIMG 25 #undef CONFIG_CMD_FPGA 26 27 /* MMC */ 28 #define CONFIG_MMC 29 #define CONFIG_CMD_MMC 30 #define CONFIG_GENERIC_MMC 31 #define CONFIG_FSL_ESDHC 32 #define CONFIG_FSL_USDHC 33 #define CONFIG_SYS_FSL_USDHC_NUM 3 34 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 35 36 /* RAM */ 37 #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR 38 #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR 39 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 40 #define CONFIG_NR_DRAM_BANKS 2 41 #define CONFIG_SYS_MEMTEST_START 0x10000000 42 #define CONFIG_SYS_MEMTEST_END 0x10010000 43 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 44 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 45 #define CONFIG_SYS_INIT_SP_OFFSET \ 46 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 47 #define CONFIG_SYS_INIT_SP_ADDR \ 48 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 49 50 /* Serial console */ 51 #define CONFIG_MXC_UART 52 #define CONFIG_MXC_UART_BASE UART4_BASE 53 #define CONFIG_BAUDRATE 115200 54 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} 55 56 /* Shell */ 57 #define CONFIG_SYS_PROMPT "CM-FX6 # " 58 #define CONFIG_SYS_CBSIZE 1024 59 #define CONFIG_SYS_MAXARGS 16 60 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 61 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 62 sizeof(CONFIG_SYS_PROMPT) + 16) 63 64 /* SPI flash */ 65 #define CONFIG_CMD_SF 66 #define CONFIG_SF_DEFAULT_BUS 0 67 #define CONFIG_SF_DEFAULT_CS 0 68 #define CONFIG_SF_DEFAULT_SPEED 25000000 69 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 70 71 /* Environment */ 72 #define CONFIG_ENV_OVERWRITE 73 #define CONFIG_ENV_IS_IN_SPI_FLASH 74 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 75 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 76 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 77 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 78 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 79 #define CONFIG_ENV_SIZE (8 * 1024) 80 #define CONFIG_ENV_OFFSET (768 * 1024) 81 82 #define CONFIG_EXTRA_ENV_SETTINGS \ 83 "stdin=serial,usbkbd\0" \ 84 "stdout=serial,vga\0" \ 85 "stderr=serial,vga\0" \ 86 "panel=HDMI\0" \ 87 "autoload=no\0" \ 88 "kernel=uImage-cm-fx6\0" \ 89 "script=boot.scr\0" \ 90 "dtb=cm-fx6.dtb\0" \ 91 "bootm_low=18000000\0" \ 92 "loadaddr=0x10800000\0" \ 93 "fdtaddr=0x11000000\0" \ 94 "console=ttymxc3,115200\0" \ 95 "ethprime=FEC0\0" \ 96 "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ 97 "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ 98 "doboot=bootm ${loadaddr}\0" \ 99 "doloadfdt=false\0" \ 100 "setboottypez=setenv kernel zImage-cm-fx6;" \ 101 "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ 102 "setenv doloadfdt true;\0" \ 103 "setboottypem=setenv kernel uImage-cm-fx6;" \ 104 "setenv doboot bootm ${loadaddr};" \ 105 "setenv doloadfdt false;\0"\ 106 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 107 "sataroot=/dev/sda2 rw rootwait\0" \ 108 "nandroot=/dev/mtdblock4 rw\0" \ 109 "nandrootfstype=ubifs\0" \ 110 "mmcargs=setenv bootargs console=${console} root=${mmcroot} " \ 111 "${video}\0" \ 112 "sataargs=setenv bootargs console=${console} root=${sataroot} " \ 113 "${video}\0" \ 114 "nandargs=setenv bootargs console=${console} " \ 115 "root=${nandroot} " \ 116 "rootfstype=${nandrootfstype} " \ 117 "${video}\0" \ 118 "nandboot=if run nandloadkernel; then " \ 119 "run nandloadfdt;" \ 120 "run setboottypem;" \ 121 "run storagebootcmd;" \ 122 "run setboottypez;" \ 123 "run storagebootcmd;" \ 124 "fi;\0" \ 125 "run_eboot=echo Starting EBOOT ...; "\ 126 "mmc dev 2 && " \ 127 "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ 128 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\ 129 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\ 130 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \ 131 "bootscript=echo Running bootscript from ${storagetype} ...;" \ 132 "source ${loadaddr};\0" \ 133 "nandloadkernel=nand read ${loadaddr} 0 780000;\0" \ 134 "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ 135 "setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \ 136 "setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \ 137 "setupnandboot=setenv storagetype nand;\0" \ 138 "setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \ 139 "storagebootcmd=echo Booting from ${storagetype} ...;" \ 140 "run ${storagetype}args; run doboot;\0" \ 141 "trybootk=if run loadkernel; then " \ 142 "if ${doloadfdt}; then " \ 143 "run loadfdt;" \ 144 "fi;" \ 145 "run storagebootcmd;" \ 146 "fi;\0" \ 147 "trybootsmz=if run loadscript; then " \ 148 "run bootscript;" \ 149 "fi;" \ 150 "run setboottypem;" \ 151 "run trybootk;" \ 152 "run setboottypez;" \ 153 "run trybootk;\0" 154 155 #define CONFIG_BOOTCOMMAND \ 156 "run setupmmcboot;" \ 157 "mmc dev ${storagedev};" \ 158 "if mmc rescan; then " \ 159 "run trybootsmz;" \ 160 "fi;" \ 161 "run setupusbboot;" \ 162 "if usb start; then "\ 163 "if run loadscript; then " \ 164 "run bootscript;" \ 165 "fi;" \ 166 "fi;" \ 167 "run setupsataboot;" \ 168 "if sata init; then " \ 169 "run trybootsmz;" \ 170 "fi;" \ 171 "run setupnandboot;" \ 172 "run nandboot;" 173 174 #define CONFIG_PREBOOT "usb start" 175 176 /* SPI */ 177 #define CONFIG_SPI 178 #define CONFIG_MXC_SPI 179 #define CONFIG_SPI_FLASH 180 #define CONFIG_SPI_FLASH_ATMEL 181 #define CONFIG_SPI_FLASH_EON 182 #define CONFIG_SPI_FLASH_GIGADEVICE 183 #define CONFIG_SPI_FLASH_MACRONIX 184 #define CONFIG_SPI_FLASH_SPANSION 185 #define CONFIG_SPI_FLASH_STMICRO 186 #define CONFIG_SPI_FLASH_SST 187 #define CONFIG_SPI_FLASH_WINBOND 188 189 /* NAND */ 190 #ifndef CONFIG_SPL_BUILD 191 #define CONFIG_CMD_NAND 192 #define CONFIG_SYS_NAND_BASE 0x40000000 193 #define CONFIG_SYS_NAND_MAX_CHIPS 1 194 #define CONFIG_SYS_MAX_NAND_DEVICE 1 195 #define CONFIG_NAND_MXS 196 #define CONFIG_SYS_NAND_ONFI_DETECTION 197 /* APBH DMA is required for NAND support */ 198 #define CONFIG_APBH_DMA 199 #define CONFIG_APBH_DMA_BURST 200 #define CONFIG_APBH_DMA_BURST8 201 #endif 202 203 /* Ethernet */ 204 #define CONFIG_FEC_MXC 205 #define CONFIG_FEC_MXC_PHYADDR 0 206 #define CONFIG_FEC_XCV_TYPE RGMII 207 #define IMX_FEC_BASE ENET_BASE_ADDR 208 #define CONFIG_PHYLIB 209 #define CONFIG_PHY_ATHEROS 210 #define CONFIG_MII 211 #define CONFIG_ETHPRIME "FEC0" 212 #define CONFIG_ARP_TIMEOUT 200UL 213 #define CONFIG_NET_RETRY_COUNT 5 214 215 /* USB */ 216 #define CONFIG_CMD_USB 217 #define CONFIG_USB_EHCI 218 #define CONFIG_USB_EHCI_MX6 219 #define CONFIG_USB_STORAGE 220 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 221 #define CONFIG_MXC_USB_FLAGS 0 222 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 223 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 224 #define CONFIG_USB_KEYBOARD 225 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 226 #define CONFIG_SYS_STDIO_DEREGISTER 227 228 /* I2C */ 229 #define CONFIG_CMD_I2C 230 #define CONFIG_SYS_I2C 231 #define CONFIG_SYS_I2C_MXC 232 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 233 #define CONFIG_SYS_I2C_SPEED 100000 234 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 235 236 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 237 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 238 #define CONFIG_SYS_I2C_EEPROM_BUS 2 239 240 /* SATA */ 241 #define CONFIG_CMD_SATA 242 #define CONFIG_SYS_SATA_MAX_DEVICE 1 243 #define CONFIG_LIBATA 244 #define CONFIG_LBA48 245 #define CONFIG_DWC_AHSATA 246 #define CONFIG_DWC_AHSATA_PORT_ID 0 247 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 248 249 /* Boot */ 250 #define CONFIG_ZERO_BOOTDELAY_CHECK 251 #define CONFIG_LOADADDR 0x10800000 252 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 253 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) 254 #define CONFIG_SERIAL_TAG 255 256 /* misc */ 257 #define CONFIG_STACKSIZE (128 * 1024) 258 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 259 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ 260 #define CONFIG_OF_BOARD_SETUP 261 262 /* SPL */ 263 #include "imx6_spl.h" 264 #define CONFIG_SPL_BOARD_INIT 265 #define CONFIG_SPL_MMC_SUPPORT 266 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ 267 #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) 268 #define CONFIG_SPL_SPI_SUPPORT 269 #define CONFIG_SPL_SPI_FLASH_SUPPORT 270 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 271 #define CONFIG_SPL_SPI_LOAD 272 273 /* Display */ 274 #define CONFIG_VIDEO 275 #define CONFIG_VIDEO_IPUV3 276 #define CONFIG_IPUV3_CLK 260000000 277 #define CONFIG_IMX_HDMI 278 #define CONFIG_IMX_VIDEO_SKIP 279 #define CONFIG_CFB_CONSOLE 280 #define CONFIG_VGA_AS_SINGLE_DEVICE 281 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 282 #define CONFIG_CONSOLE_MUX 283 #define CONFIG_VIDEO_SW_CURSOR 284 285 #define CONFIG_SPLASH_SCREEN 286 #define CONFIG_SPLASH_SOURCE 287 #define CONFIG_CMD_BMP 288 #define CONFIG_VIDEO_BMP_RLE8 289 290 #define CONFIG_VIDEO_LOGO 291 #define CONFIG_VIDEO_BMP_LOGO 292 293 #endif /* __CONFIG_CM_FX6_H */ 294