xref: /rk3399_rockchip-uboot/include/configs/clearfog.h (revision 6500ec7a5a2a2a59128dba6f49d9905fc1258811)
10299c90fSStefan Roese /*
20299c90fSStefan Roese  * Copyright (C) 2015 Stefan Roese <sr@denx.de>
30299c90fSStefan Roese  *
40299c90fSStefan Roese  * SPDX-License-Identifier:	GPL-2.0+
50299c90fSStefan Roese  */
60299c90fSStefan Roese 
70299c90fSStefan Roese #ifndef _CONFIG_CLEARFOG_H
80299c90fSStefan Roese #define _CONFIG_CLEARFOG_H
90299c90fSStefan Roese 
100299c90fSStefan Roese /*
110299c90fSStefan Roese  * High Level Configuration Options (easy to change)
120299c90fSStefan Roese  */
130299c90fSStefan Roese 
140299c90fSStefan Roese #define CONFIG_DISPLAY_BOARDINFO_LATE
150299c90fSStefan Roese 
160299c90fSStefan Roese /*
170299c90fSStefan Roese  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
180299c90fSStefan Roese  * for DDR ECC byte filling in the SPL before loading the main
190299c90fSStefan Roese  * U-Boot into it.
200299c90fSStefan Roese  */
210299c90fSStefan Roese #define	CONFIG_SYS_TEXT_BASE	0x00800000
220299c90fSStefan Roese #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
230299c90fSStefan Roese 
240299c90fSStefan Roese /*
250299c90fSStefan Roese  * Commands configuration
260299c90fSStefan Roese  */
270299c90fSStefan Roese 
280299c90fSStefan Roese /* I2C */
290299c90fSStefan Roese #define CONFIG_SYS_I2C
300299c90fSStefan Roese #define CONFIG_SYS_I2C_MVTWSI
310299c90fSStefan Roese #define CONFIG_I2C_MVTWSI_BASE0		MVEBU_TWSI_BASE
320299c90fSStefan Roese #define CONFIG_SYS_I2C_SLAVE		0x0
330299c90fSStefan Roese #define CONFIG_SYS_I2C_SPEED		100000
340299c90fSStefan Roese 
350299c90fSStefan Roese /* SPI NOR flash default params, used by sf commands */
360299c90fSStefan Roese #define CONFIG_SF_DEFAULT_SPEED		1000000
370299c90fSStefan Roese #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
380299c90fSStefan Roese #define CONFIG_SPI_FLASH_STMICRO
390299c90fSStefan Roese 
400299c90fSStefan Roese /*
410299c90fSStefan Roese  * SDIO/MMC Card Configuration
420299c90fSStefan Roese  */
430299c90fSStefan Roese #define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE
440299c90fSStefan Roese 
450299c90fSStefan Roese /* Partition support */
460299c90fSStefan Roese 
470299c90fSStefan Roese /* Additional FS support/configuration */
480299c90fSStefan Roese #define CONFIG_SUPPORT_VFAT
490299c90fSStefan Roese 
500299c90fSStefan Roese /* USB/EHCI configuration */
510299c90fSStefan Roese #define CONFIG_EHCI_IS_TDI
520299c90fSStefan Roese 
530299c90fSStefan Roese #define CONFIG_ENV_MIN_ENTRIES		128
540299c90fSStefan Roese 
550299c90fSStefan Roese /* Environment in MMC */
560299c90fSStefan Roese #define CONFIG_SYS_MMC_ENV_DEV		0
570299c90fSStefan Roese #define CONFIG_ENV_SECT_SIZE		0x200
580299c90fSStefan Roese #define CONFIG_ENV_SIZE			0x10000
590299c90fSStefan Roese /*
600299c90fSStefan Roese  * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
610299c90fSStefan Roese  * boot image starts @ LBA-0.
620299c90fSStefan Roese  * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
630299c90fSStefan Roese  * image and environment
640299c90fSStefan Roese  */
650299c90fSStefan Roese #define CONFIG_ENV_OFFSET		0xf0000
660299c90fSStefan Roese #define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET
670299c90fSStefan Roese 
680299c90fSStefan Roese #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
690299c90fSStefan Roese #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
700299c90fSStefan Roese 
710299c90fSStefan Roese /* PCIe support */
720299c90fSStefan Roese #ifndef CONFIG_SPL_BUILD
730299c90fSStefan Roese #define CONFIG_PCI_MVEBU
740299c90fSStefan Roese #define CONFIG_PCI_SCAN_SHOW
750299c90fSStefan Roese #endif
760299c90fSStefan Roese 
770299c90fSStefan Roese #define CONFIG_SYS_ALT_MEMTEST
780299c90fSStefan Roese 
790299c90fSStefan Roese /* Keep device tree and initrd in lower memory so the kernel can access them */
80*f3d9ec2aSPatrick Wildt #define RELOCATION_LIMITS_ENV_SETTINGS	\
810299c90fSStefan Roese 	"fdt_high=0x10000000\0"		\
820299c90fSStefan Roese 	"initrd_high=0x10000000\0"
830299c90fSStefan Roese 
840299c90fSStefan Roese /* SPL */
850299c90fSStefan Roese /*
860299c90fSStefan Roese  * Select the boot device here
870299c90fSStefan Roese  *
880299c90fSStefan Roese  * Currently supported are:
890299c90fSStefan Roese  * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
900299c90fSStefan Roese  * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
910299c90fSStefan Roese  */
920299c90fSStefan Roese #define SPL_BOOT_SPI_NOR_FLASH		1
930299c90fSStefan Roese #define SPL_BOOT_SDIO_MMC_CARD		2
940299c90fSStefan Roese #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SDIO_MMC_CARD
950299c90fSStefan Roese 
960299c90fSStefan Roese /* Defines for SPL */
970299c90fSStefan Roese #define CONFIG_SPL_FRAMEWORK
980299c90fSStefan Roese #define CONFIG_SPL_SIZE			(140 << 10)
990299c90fSStefan Roese #define CONFIG_SPL_TEXT_BASE		0x40000030
1000299c90fSStefan Roese #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x0030)
1010299c90fSStefan Roese 
1020299c90fSStefan Roese #define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
1030299c90fSStefan Roese #define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
1040299c90fSStefan Roese 
1050299c90fSStefan Roese #ifdef CONFIG_SPL_BUILD
1060299c90fSStefan Roese #define CONFIG_SYS_MALLOC_SIMPLE
1070299c90fSStefan Roese #endif
1080299c90fSStefan Roese 
1090299c90fSStefan Roese #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
1100299c90fSStefan Roese #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
1110299c90fSStefan Roese 
1120299c90fSStefan Roese #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
1130299c90fSStefan Roese /* SPL related SPI defines */
1140299c90fSStefan Roese #define CONFIG_SPL_SPI_LOAD
1150299c90fSStefan Roese #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
1160299c90fSStefan Roese #define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
1170299c90fSStefan Roese #endif
1180299c90fSStefan Roese 
1190299c90fSStefan Roese #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
1200299c90fSStefan Roese /* SPL related MMC defines */
1210299c90fSStefan Roese #define CONFIG_SYS_MMC_U_BOOT_OFFS		(160 << 10)
1220299c90fSStefan Roese #define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
1230299c90fSStefan Roese #ifdef CONFIG_SPL_BUILD
1240299c90fSStefan Roese #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
1250299c90fSStefan Roese #endif
1260299c90fSStefan Roese #endif
1270299c90fSStefan Roese 
1280299c90fSStefan Roese /*
1290299c90fSStefan Roese  * mv-common.h should be defined after CMD configs since it used them
1300299c90fSStefan Roese  * to enable certain macros
1310299c90fSStefan Roese  */
1320299c90fSStefan Roese #include "mv-common.h"
1330299c90fSStefan Roese 
134*f3d9ec2aSPatrick Wildt /* Include the common distro boot environment */
135*f3d9ec2aSPatrick Wildt #ifndef CONFIG_SPL_BUILD
136*f3d9ec2aSPatrick Wildt #include <config_distro_defaults.h>
137*f3d9ec2aSPatrick Wildt 
138*f3d9ec2aSPatrick Wildt #ifdef CONFIG_MMC
139*f3d9ec2aSPatrick Wildt #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
140*f3d9ec2aSPatrick Wildt #else
141*f3d9ec2aSPatrick Wildt #define BOOT_TARGET_DEVICES_MMC(func)
142*f3d9ec2aSPatrick Wildt #endif
143*f3d9ec2aSPatrick Wildt 
144*f3d9ec2aSPatrick Wildt #ifdef CONFIG_USB_STORAGE
145*f3d9ec2aSPatrick Wildt #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
146*f3d9ec2aSPatrick Wildt #else
147*f3d9ec2aSPatrick Wildt #define BOOT_TARGET_DEVICES_USB(func)
148*f3d9ec2aSPatrick Wildt #endif
149*f3d9ec2aSPatrick Wildt 
150*f3d9ec2aSPatrick Wildt #define BOOT_TARGET_DEVICES(func) \
151*f3d9ec2aSPatrick Wildt 	BOOT_TARGET_DEVICES_MMC(func) \
152*f3d9ec2aSPatrick Wildt 	BOOT_TARGET_DEVICES_USB(func) \
153*f3d9ec2aSPatrick Wildt 	func(PXE, pxe, na) \
154*f3d9ec2aSPatrick Wildt 	func(DHCP, dhcp, na)
155*f3d9ec2aSPatrick Wildt 
156*f3d9ec2aSPatrick Wildt #define KERNEL_ADDR_R	__stringify(0x800000)
157*f3d9ec2aSPatrick Wildt #define FDT_ADDR_R	__stringify(0x100000)
158*f3d9ec2aSPatrick Wildt #define RAMDISK_ADDR_R	__stringify(0x1800000)
159*f3d9ec2aSPatrick Wildt #define SCRIPT_ADDR_R	__stringify(0x200000)
160*f3d9ec2aSPatrick Wildt #define PXEFILE_ADDR_R	__stringify(0x300000)
161*f3d9ec2aSPatrick Wildt 
162*f3d9ec2aSPatrick Wildt #define LOAD_ADDRESS_ENV_SETTINGS \
163*f3d9ec2aSPatrick Wildt 	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
164*f3d9ec2aSPatrick Wildt 	"fdt_addr_r=" FDT_ADDR_R "\0" \
165*f3d9ec2aSPatrick Wildt 	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
166*f3d9ec2aSPatrick Wildt 	"scriptaddr=" SCRIPT_ADDR_R "\0" \
167*f3d9ec2aSPatrick Wildt 	"pxefile_addr_r=" PXEFILE_ADDR_R "\0"
168*f3d9ec2aSPatrick Wildt 
169*f3d9ec2aSPatrick Wildt #include <config_distro_bootcmd.h>
170*f3d9ec2aSPatrick Wildt 
171*f3d9ec2aSPatrick Wildt #define CONFIG_EXTRA_ENV_SETTINGS \
172*f3d9ec2aSPatrick Wildt 	RELOCATION_LIMITS_ENV_SETTINGS \
173*f3d9ec2aSPatrick Wildt 	LOAD_ADDRESS_ENV_SETTINGS \
174*f3d9ec2aSPatrick Wildt 	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
175*f3d9ec2aSPatrick Wildt 	"console=ttyS0,115200\0" \
176*f3d9ec2aSPatrick Wildt 	BOOTENV
177*f3d9ec2aSPatrick Wildt 
178*f3d9ec2aSPatrick Wildt #endif /* CONFIG_SPL_BUILD */
179*f3d9ec2aSPatrick Wildt 
1800299c90fSStefan Roese #endif /* _CONFIG_CLEARFOG_H */
181