xref: /rk3399_rockchip-uboot/include/configs/cgtqmx6eval.h (revision f8b19a889e0d9d21af4be6b0fd6363a5b5a546f7)
1 /*
2  *
3  * Congatec Conga-QEVAl board configuration file.
4  *
5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8  * Leo Sartre, <lsartre@adeneo-embedded.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4122
19 
20 #ifdef CONFIG_SPL
21 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
22 #define CONFIG_SPL_SPI_LOAD
23 #include "imx6_spl.h"
24 #endif
25 
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
28 
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_BOARD_LATE_INIT
31 #define CONFIG_MISC_INIT_R
32 
33 #define CONFIG_MXC_UART
34 #define CONFIG_MXC_UART_BASE	       UART2_BASE
35 
36 /* MMC Configs */
37 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
38 
39 /* SPI NOR */
40 #define CONFIG_SPI_FLASH
41 #define CONFIG_SPI_FLASH_STMICRO
42 #define CONFIG_SPI_FLASH_SST
43 #define CONFIG_MXC_SPI
44 #define CONFIG_SF_DEFAULT_BUS		0
45 #define CONFIG_SF_DEFAULT_SPEED		20000000
46 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
47 
48 /* Miscellaneous commands */
49 #define CONFIG_CMD_BMODE
50 
51 /* Thermal support */
52 #define CONFIG_IMX_THERMAL
53 
54 /* I2C Configs */
55 #define CONFIG_SYS_I2C
56 #define CONFIG_SYS_I2C_MXC
57 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
58 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
59 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
60 #define CONFIG_SYS_I2C_SPEED		  100000
61 
62 /* PMIC */
63 #define CONFIG_POWER
64 #define CONFIG_POWER_I2C
65 #define CONFIG_POWER_PFUZE100
66 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
67 
68 /* USB Configs */
69 #define CONFIG_USB_EHCI
70 #define CONFIG_USB_EHCI_MX6
71 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
72 #define CONFIG_USB_HOST_ETHER
73 #define CONFIG_USB_ETHER_ASIX
74 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
75 #define CONFIG_MXC_USB_FLAGS	0
76 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
77 #define CONFIG_USB_KEYBOARD
78 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
79 
80 #define CONFIG_USBD_HS
81 
82 #define CONFIG_USB_FUNCTION_MASS_STORAGE
83 
84 #define CONFIG_USB_FUNCTION_FASTBOOT
85 #define CONFIG_CMD_FASTBOOT
86 #define CONFIG_ANDROID_BOOT_IMAGE
87 #define CONFIG_FASTBOOT_BUF_ADDR   CONFIG_SYS_LOAD_ADDR
88 #define CONFIG_FASTBOOT_BUF_SIZE   0x07000000
89 
90 /* Framebuffer */
91 #define CONFIG_VIDEO_IPUV3
92 #define CONFIG_CFB_CONSOLE
93 #define CONFIG_VGA_AS_SINGLE_DEVICE
94 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
95 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
96 #define CONFIG_VIDEO_BMP_RLE8
97 #define CONFIG_SPLASH_SCREEN
98 #define CONFIG_SPLASH_SCREEN_ALIGN
99 #define CONFIG_BMP_16BPP
100 #define CONFIG_VIDEO_LOGO
101 #define CONFIG_VIDEO_BMP_LOGO
102 #ifdef CONFIG_MX6DL
103 #define CONFIG_IPUV3_CLK 198000000
104 #else
105 #define CONFIG_IPUV3_CLK 264000000
106 #endif
107 #define CONFIG_IMX_HDMI
108 
109 /* SATA */
110 #define CONFIG_CMD_SATA
111 #define CONFIG_DWC_AHSATA
112 #define CONFIG_SYS_SATA_MAX_DEVICE	1
113 #define CONFIG_DWC_AHSATA_PORT_ID	0
114 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
115 #define CONFIG_LBA48
116 #define CONFIG_LIBATA
117 
118 /* Ethernet */
119 #define CONFIG_FEC_MXC
120 #define CONFIG_MII
121 #define IMX_FEC_BASE			ENET_BASE_ADDR
122 #define CONFIG_FEC_XCV_TYPE		RGMII
123 #define CONFIG_ETHPRIME			"FEC"
124 #define CONFIG_FEC_MXC_PHYADDR		6
125 #define CONFIG_PHYLIB
126 #define CONFIG_PHY_ATHEROS
127 
128 /* Command definition */
129 
130 #define CONFIG_MXC_UART_BASE	UART2_BASE
131 #define CONFIG_CONSOLE_DEV	"ttymxc1"
132 #define CONFIG_MMCROOT		"/dev/mmcblk0p2"
133 #define CONFIG_SYS_MMC_ENV_DEV		0
134 
135 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
136 #define CONFIG_EXTRA_ENV_SETTINGS \
137 	"script=boot.scr\0" \
138 	"image=zImage\0" \
139 	"fdtfile=undefined\0" \
140 	"fdt_addr_r=0x18000000\0" \
141 	"boot_fdt=try\0" \
142 	"ip_dyn=yes\0" \
143 	"console=" CONFIG_CONSOLE_DEV "\0" \
144 	"dfuspi=dfu 0 sf 0:0:10000000:0\0" \
145 	"dfu_alt_info_spl=spl raw 0x400\0" \
146 	"dfu_alt_info_img=u-boot raw 0x10000\0" \
147 	"dfu_alt_info=spl raw 0x400\0" \
148 	"bootm_size=0x10000000\0" \
149 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
150 	"mmcpart=1\0" \
151 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
152 	"update_sd_firmware=" \
153 		"if test ${ip_dyn} = yes; then " \
154 			"setenv get_cmd dhcp; " \
155 		"else " \
156 			"setenv get_cmd tftp; " \
157 		"fi; " \
158 		"if mmc dev ${mmcdev}; then "	\
159 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
160 				"setexpr fw_sz ${filesize} / 0x200; " \
161 				"setexpr fw_sz ${fw_sz} + 1; "	\
162 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
163 			"fi; "	\
164 		"fi\0" \
165 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
166 		"root=${mmcroot}\0" \
167 	"loadbootscript=" \
168 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
169 	"bootscript=echo Running bootscript from mmc ...; " \
170 		"source\0" \
171 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
172 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
173 	"mmcboot=echo Booting from mmc ...; " \
174 		"run mmcargs; " \
175 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
176 			"if run loadfdt; then " \
177 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
178 			"else " \
179 				"if test ${boot_fdt} = try; then " \
180 					"bootz; " \
181 				"else " \
182 					"echo WARN: Cannot load the DT; " \
183 				"fi; " \
184 			"fi; " \
185 		"else " \
186 			"bootz; " \
187 		"fi;\0" \
188 	"findfdt="\
189 		"if test $board_rev = MX6Q ; then " \
190 			"setenv fdtfile imx6q-qmx6.dtb; fi; " \
191 		"if test $board_rev = MX6DL ; then " \
192 			"setenv fdtfile imx6dl-qmx6.dtb; fi; " \
193 		"if test $fdtfile = undefined; then " \
194 			"echo WARNING: Could not determine dtb to use; fi; \0" \
195 	"netargs=setenv bootargs console=${console},${baudrate} " \
196 		"root=/dev/nfs " \
197 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
198 	"netboot=echo Booting from net ...; " \
199 		"run netargs; " \
200 		"if test ${ip_dyn} = yes; then " \
201 			"setenv get_cmd dhcp; " \
202 		"else " \
203 			"setenv get_cmd tftp; " \
204 		"fi; " \
205 		"${get_cmd} ${image}; " \
206 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
207 			"if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
208 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
209 			"else " \
210 				"if test ${boot_fdt} = try; then " \
211 					"bootz; " \
212 				"else " \
213 					"echo WARN: Cannot load the DT; " \
214 				"fi; " \
215 			"fi; " \
216 		"else " \
217 			"bootz; " \
218 		"fi;\0" \
219 	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
220 
221 #define CONFIG_BOOTCOMMAND \
222 	"run spilock;"	    \
223 	"run findfdt; "	\
224 	"mmc dev ${mmcdev};" \
225 	"if mmc rescan; then " \
226 		"if run loadbootscript; then " \
227 		"run bootscript; " \
228 		"else " \
229 			"if run loadimage; then " \
230 				"run mmcboot; " \
231 			"else run netboot; " \
232 			"fi; " \
233 		"fi; " \
234 	"else run netboot; fi"
235 
236 #define CONFIG_SYS_MEMTEST_START       0x10000000
237 #define CONFIG_SYS_MEMTEST_END	       0x10010000
238 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
239 
240 /* Physical Memory Map */
241 #define CONFIG_NR_DRAM_BANKS	       1
242 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
243 
244 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
245 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
246 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
247 
248 #define CONFIG_SYS_INIT_SP_OFFSET \
249 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
250 #define CONFIG_SYS_INIT_SP_ADDR \
251 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
252 
253 /* Environment organization */
254 #if defined (CONFIG_ENV_IS_IN_MMC)
255 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
256 #define CONFIG_SYS_MMC_ENV_DEV		0
257 #endif
258 
259 #define CONFIG_ENV_SIZE			(8 * 1024)
260 
261 #define CONFIG_ENV_IS_IN_SPI_FLASH
262 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
263 #define CONFIG_ENV_OFFSET		(768 * 1024)
264 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
265 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
266 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
267 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
268 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
269 #endif
270 
271 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
272