1 /* 2 * 3 * Congatec Conga-QEVAl board configuration file. 4 * 5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 8 * Leo Sartre, <lsartre@adeneo-embedded.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_CGTQMX6EVAL_H 14 #define __CONFIG_CGTQMX6EVAL_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4122 19 20 /* Size of malloc() pool */ 21 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 22 23 #define CONFIG_BOARD_EARLY_INIT_F 24 #define CONFIG_MISC_INIT_R 25 26 #define CONFIG_MXC_UART 27 #define CONFIG_MXC_UART_BASE UART2_BASE 28 29 /* MMC Configs */ 30 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 31 32 /* SPI NOR */ 33 #define CONFIG_CMD_SF 34 #define CONFIG_SPI_FLASH 35 #define CONFIG_SPI_FLASH_STMICRO 36 #define CONFIG_SPI_FLASH_SST 37 #define CONFIG_MXC_SPI 38 #define CONFIG_SF_DEFAULT_BUS 0 39 #define CONFIG_SF_DEFAULT_SPEED 20000000 40 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 41 42 /* Miscellaneous commands */ 43 #define CONFIG_CMD_BMODE 44 45 /* Thermal support */ 46 #define CONFIG_IMX_THERMAL 47 48 /* I2C Configs */ 49 #define CONFIG_CMD_I2C 50 #define CONFIG_SYS_I2C 51 #define CONFIG_SYS_I2C_MXC 52 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 53 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 54 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 55 #define CONFIG_SYS_I2C_SPEED 100000 56 57 /* PMIC */ 58 #define CONFIG_POWER 59 #define CONFIG_POWER_I2C 60 #define CONFIG_POWER_PFUZE100 61 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 62 63 /* USB Configs */ 64 #define CONFIG_CMD_USB 65 #define CONFIG_CMD_FAT 66 #define CONFIG_USB_EHCI 67 #define CONFIG_USB_EHCI_MX6 68 #define CONFIG_USB_STORAGE 69 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 70 #define CONFIG_USB_HOST_ETHER 71 #define CONFIG_USB_ETHER_ASIX 72 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 73 #define CONFIG_MXC_USB_FLAGS 0 74 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 75 #define CONFIG_USB_KEYBOARD 76 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 77 78 #define CONFIG_CI_UDC 79 #define CONFIG_USBD_HS 80 #define CONFIG_USB_GADGET_DUALSPEED 81 82 #define CONFIG_USB_GADGET 83 #define CONFIG_CMD_USB_MASS_STORAGE 84 #define CONFIG_USB_FUNCTION_MASS_STORAGE 85 #define CONFIG_USB_GADGET_DOWNLOAD 86 #define CONFIG_USB_GADGET_VBUS_DRAW 2 87 88 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 89 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 90 #define CONFIG_G_DNL_MANUFACTURER "Congatec" 91 92 #define CONFIG_USB_FUNCTION_FASTBOOT 93 #define CONFIG_CMD_FASTBOOT 94 #define CONFIG_ANDROID_BOOT_IMAGE 95 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 96 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 97 98 /* Framebuffer */ 99 #define CONFIG_VIDEO 100 #define CONFIG_VIDEO_IPUV3 101 #define CONFIG_CFB_CONSOLE 102 #define CONFIG_VGA_AS_SINGLE_DEVICE 103 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 104 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 105 #define CONFIG_VIDEO_BMP_RLE8 106 #define CONFIG_SPLASH_SCREEN 107 #define CONFIG_SPLASH_SCREEN_ALIGN 108 #define CONFIG_BMP_16BPP 109 #define CONFIG_VIDEO_LOGO 110 #define CONFIG_VIDEO_BMP_LOGO 111 #ifdef CONFIG_MX6DL 112 #define CONFIG_IPUV3_CLK 198000000 113 #else 114 #define CONFIG_IPUV3_CLK 264000000 115 #endif 116 #define CONFIG_IMX_HDMI 117 118 /* SATA */ 119 #define CONFIG_CMD_SATA 120 #define CONFIG_DWC_AHSATA 121 #define CONFIG_SYS_SATA_MAX_DEVICE 1 122 #define CONFIG_DWC_AHSATA_PORT_ID 0 123 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 124 #define CONFIG_LBA48 125 #define CONFIG_LIBATA 126 127 /* Ethernet */ 128 #define CONFIG_CMD_PING 129 #define CONFIG_CMD_DHCP 130 #define CONFIG_CMD_MII 131 #define CONFIG_FEC_MXC 132 #define CONFIG_MII 133 #define IMX_FEC_BASE ENET_BASE_ADDR 134 #define CONFIG_FEC_XCV_TYPE RGMII 135 #define CONFIG_ETHPRIME "FEC" 136 #define CONFIG_FEC_MXC_PHYADDR 6 137 #define CONFIG_PHYLIB 138 #define CONFIG_PHY_ATHEROS 139 140 /* Command definition */ 141 142 #define CONFIG_MXC_UART_BASE UART2_BASE 143 #define CONFIG_CONSOLE_DEV "ttymxc1" 144 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 145 #define CONFIG_SYS_MMC_ENV_DEV 0 146 147 #define CONFIG_EXTRA_ENV_SETTINGS \ 148 "script=boot.scr\0" \ 149 "image=zImage\0" \ 150 "fdtfile=imx6q-qmx6.dtb\0" \ 151 "fdt_addr_r=0x18000000\0" \ 152 "boot_fdt=try\0" \ 153 "ip_dyn=yes\0" \ 154 "console=" CONFIG_CONSOLE_DEV "\0" \ 155 "bootm_size=0x10000000\0" \ 156 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 157 "mmcpart=1\0" \ 158 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 159 "update_sd_firmware=" \ 160 "if test ${ip_dyn} = yes; then " \ 161 "setenv get_cmd dhcp; " \ 162 "else " \ 163 "setenv get_cmd tftp; " \ 164 "fi; " \ 165 "if mmc dev ${mmcdev}; then " \ 166 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 167 "setexpr fw_sz ${filesize} / 0x200; " \ 168 "setexpr fw_sz ${fw_sz} + 1; " \ 169 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 170 "fi; " \ 171 "fi\0" \ 172 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 173 "root=${mmcroot}\0" \ 174 "loadbootscript=" \ 175 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 176 "bootscript=echo Running bootscript from mmc ...; " \ 177 "source\0" \ 178 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 179 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 180 "mmcboot=echo Booting from mmc ...; " \ 181 "run mmcargs; " \ 182 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 183 "if run loadfdt; then " \ 184 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 185 "else " \ 186 "if test ${boot_fdt} = try; then " \ 187 "bootz; " \ 188 "else " \ 189 "echo WARN: Cannot load the DT; " \ 190 "fi; " \ 191 "fi; " \ 192 "else " \ 193 "bootz; " \ 194 "fi;\0" \ 195 "netargs=setenv bootargs console=${console},${baudrate} " \ 196 "root=/dev/nfs " \ 197 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 198 "netboot=echo Booting from net ...; " \ 199 "run netargs; " \ 200 "if test ${ip_dyn} = yes; then " \ 201 "setenv get_cmd dhcp; " \ 202 "else " \ 203 "setenv get_cmd tftp; " \ 204 "fi; " \ 205 "${get_cmd} ${image}; " \ 206 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 207 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 208 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 209 "else " \ 210 "if test ${boot_fdt} = try; then " \ 211 "bootz; " \ 212 "else " \ 213 "echo WARN: Cannot load the DT; " \ 214 "fi; " \ 215 "fi; " \ 216 "else " \ 217 "bootz; " \ 218 "fi;\0" \ 219 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 220 221 #define CONFIG_BOOTCOMMAND \ 222 "run spilock;" \ 223 "mmc dev ${mmcdev};" \ 224 "if mmc rescan; then " \ 225 "if run loadbootscript; then " \ 226 "run bootscript; " \ 227 "else " \ 228 "if run loadimage; then " \ 229 "run mmcboot; " \ 230 "else run netboot; " \ 231 "fi; " \ 232 "fi; " \ 233 "else run netboot; fi" 234 235 #define CONFIG_SYS_MEMTEST_START 0x10000000 236 #define CONFIG_SYS_MEMTEST_END 0x10010000 237 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 238 239 /* Physical Memory Map */ 240 #define CONFIG_NR_DRAM_BANKS 1 241 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 242 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 243 244 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 245 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 246 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 247 248 #define CONFIG_SYS_INIT_SP_OFFSET \ 249 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 250 #define CONFIG_SYS_INIT_SP_ADDR \ 251 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 252 253 /* Environment organization */ 254 #if defined (CONFIG_ENV_IS_IN_MMC) 255 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 256 #define CONFIG_SYS_MMC_ENV_DEV 0 257 #endif 258 259 #define CONFIG_ENV_SIZE (8 * 1024) 260 261 #define CONFIG_ENV_IS_IN_SPI_FLASH 262 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 263 #define CONFIG_ENV_OFFSET (768 * 1024) 264 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 265 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 266 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 267 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 268 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 269 #endif 270 271 #endif /* __CONFIG_CGTQMX6EVAL_H */ 272