xref: /rk3399_rockchip-uboot/include/configs/cgtqmx6eval.h (revision 84f2a5d0a6c4d267ce9aeb5eaab3c4d419a605ac)
1 /*
2  *
3  * Congatec Conga-QEVAl board configuration file.
4  *
5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8  * Leo Sartre, <lsartre@adeneo-embedded.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4122
19 
20 #ifdef CONFIG_SPL
21 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
22 #define CONFIG_SPL_SPI_LOAD
23 #include "imx6_spl.h"
24 #endif
25 
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
28 
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_BOARD_LATE_INIT
31 #define CONFIG_MISC_INIT_R
32 
33 #define CONFIG_MXC_UART
34 #define CONFIG_MXC_UART_BASE	       UART2_BASE
35 
36 /* MMC Configs */
37 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
38 
39 /* SPI NOR */
40 #define CONFIG_SPI_FLASH
41 #define CONFIG_SPI_FLASH_STMICRO
42 #define CONFIG_SPI_FLASH_SST
43 #define CONFIG_MXC_SPI
44 #define CONFIG_SF_DEFAULT_BUS		0
45 #define CONFIG_SF_DEFAULT_SPEED		20000000
46 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
47 
48 /* Miscellaneous commands */
49 #define CONFIG_CMD_BMODE
50 
51 /* Thermal support */
52 #define CONFIG_IMX_THERMAL
53 
54 /* I2C Configs */
55 #define CONFIG_SYS_I2C
56 #define CONFIG_SYS_I2C_MXC
57 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
58 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
59 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
60 #define CONFIG_SYS_I2C_SPEED		  100000
61 
62 /* PMIC */
63 #define CONFIG_POWER
64 #define CONFIG_POWER_I2C
65 #define CONFIG_POWER_PFUZE100
66 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
67 
68 /* USB Configs */
69 #define CONFIG_USB_EHCI
70 #define CONFIG_USB_EHCI_MX6
71 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
72 #define CONFIG_USB_HOST_ETHER
73 #define CONFIG_USB_ETHER_ASIX
74 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
75 #define CONFIG_MXC_USB_FLAGS	0
76 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
77 #define CONFIG_USB_KEYBOARD
78 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
79 
80 #define CONFIG_USBD_HS
81 
82 #define CONFIG_USB_FUNCTION_MASS_STORAGE
83 
84 #define CONFIG_USB_FUNCTION_FASTBOOT
85 #define CONFIG_CMD_FASTBOOT
86 #define CONFIG_ANDROID_BOOT_IMAGE
87 #define CONFIG_FASTBOOT_BUF_ADDR   CONFIG_SYS_LOAD_ADDR
88 #define CONFIG_FASTBOOT_BUF_SIZE   0x07000000
89 
90 /* Framebuffer */
91 #define CONFIG_VIDEO_IPUV3
92 #define CONFIG_VIDEO_BMP_RLE8
93 #define CONFIG_SPLASH_SCREEN
94 #define CONFIG_SPLASH_SCREEN_ALIGN
95 #define CONFIG_BMP_16BPP
96 #define CONFIG_VIDEO_LOGO
97 #define CONFIG_VIDEO_BMP_LOGO
98 #ifdef CONFIG_MX6DL
99 #define CONFIG_IPUV3_CLK 198000000
100 #else
101 #define CONFIG_IPUV3_CLK 264000000
102 #endif
103 #define CONFIG_IMX_HDMI
104 
105 /* SATA */
106 #define CONFIG_CMD_SATA
107 #define CONFIG_DWC_AHSATA
108 #define CONFIG_SYS_SATA_MAX_DEVICE	1
109 #define CONFIG_DWC_AHSATA_PORT_ID	0
110 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
111 #define CONFIG_LBA48
112 #define CONFIG_LIBATA
113 
114 /* Ethernet */
115 #define CONFIG_FEC_MXC
116 #define CONFIG_MII
117 #define IMX_FEC_BASE			ENET_BASE_ADDR
118 #define CONFIG_FEC_XCV_TYPE		RGMII
119 #define CONFIG_ETHPRIME			"FEC"
120 #define CONFIG_FEC_MXC_PHYADDR		6
121 #define CONFIG_PHYLIB
122 #define CONFIG_PHY_ATHEROS
123 
124 /* Command definition */
125 
126 #define CONFIG_MXC_UART_BASE	UART2_BASE
127 #define CONSOLE_DEV	"ttymxc1"
128 #define CONFIG_MMCROOT		"/dev/mmcblk0p2"
129 #define CONFIG_SYS_MMC_ENV_DEV		0
130 
131 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
132 #define CONFIG_EXTRA_ENV_SETTINGS \
133 	"script=boot.scr\0" \
134 	"image=zImage\0" \
135 	"fdtfile=undefined\0" \
136 	"fdt_addr_r=0x18000000\0" \
137 	"boot_fdt=try\0" \
138 	"ip_dyn=yes\0" \
139 	"console=" CONSOLE_DEV "\0" \
140 	"dfuspi=dfu 0 sf 0:0:10000000:0\0" \
141 	"dfu_alt_info_spl=spl raw 0x400\0" \
142 	"dfu_alt_info_img=u-boot raw 0x10000\0" \
143 	"dfu_alt_info=spl raw 0x400\0" \
144 	"bootm_size=0x10000000\0" \
145 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
146 	"mmcpart=1\0" \
147 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
148 	"update_sd_firmware=" \
149 		"if test ${ip_dyn} = yes; then " \
150 			"setenv get_cmd dhcp; " \
151 		"else " \
152 			"setenv get_cmd tftp; " \
153 		"fi; " \
154 		"if mmc dev ${mmcdev}; then "	\
155 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
156 				"setexpr fw_sz ${filesize} / 0x200; " \
157 				"setexpr fw_sz ${fw_sz} + 1; "	\
158 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
159 			"fi; "	\
160 		"fi\0" \
161 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
162 		"root=${mmcroot}\0" \
163 	"loadbootscript=" \
164 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
165 	"bootscript=echo Running bootscript from mmc ...; " \
166 		"source\0" \
167 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
168 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
169 	"mmcboot=echo Booting from mmc ...; " \
170 		"run mmcargs; " \
171 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
172 			"if run loadfdt; then " \
173 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
174 			"else " \
175 				"if test ${boot_fdt} = try; then " \
176 					"bootz; " \
177 				"else " \
178 					"echo WARN: Cannot load the DT; " \
179 				"fi; " \
180 			"fi; " \
181 		"else " \
182 			"bootz; " \
183 		"fi;\0" \
184 	"findfdt="\
185 		"if test $board_rev = MX6Q ; then " \
186 			"setenv fdtfile imx6q-qmx6.dtb; fi; " \
187 		"if test $board_rev = MX6DL ; then " \
188 			"setenv fdtfile imx6dl-qmx6.dtb; fi; " \
189 		"if test $fdtfile = undefined; then " \
190 			"echo WARNING: Could not determine dtb to use; fi; \0" \
191 	"netargs=setenv bootargs console=${console},${baudrate} " \
192 		"root=/dev/nfs " \
193 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
194 	"netboot=echo Booting from net ...; " \
195 		"run netargs; " \
196 		"if test ${ip_dyn} = yes; then " \
197 			"setenv get_cmd dhcp; " \
198 		"else " \
199 			"setenv get_cmd tftp; " \
200 		"fi; " \
201 		"${get_cmd} ${image}; " \
202 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
203 			"if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
204 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
205 			"else " \
206 				"if test ${boot_fdt} = try; then " \
207 					"bootz; " \
208 				"else " \
209 					"echo WARN: Cannot load the DT; " \
210 				"fi; " \
211 			"fi; " \
212 		"else " \
213 			"bootz; " \
214 		"fi;\0" \
215 	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
216 
217 #define CONFIG_BOOTCOMMAND \
218 	"run spilock;"	    \
219 	"run findfdt; "	\
220 	"mmc dev ${mmcdev};" \
221 	"if mmc rescan; then " \
222 		"if run loadbootscript; then " \
223 		"run bootscript; " \
224 		"else " \
225 			"if run loadimage; then " \
226 				"run mmcboot; " \
227 			"else run netboot; " \
228 			"fi; " \
229 		"fi; " \
230 	"else run netboot; fi"
231 
232 #define CONFIG_SYS_MEMTEST_START       0x10000000
233 #define CONFIG_SYS_MEMTEST_END	       0x10010000
234 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
235 
236 /* Physical Memory Map */
237 #define CONFIG_NR_DRAM_BANKS	       1
238 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
239 
240 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
241 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
242 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
243 
244 #define CONFIG_SYS_INIT_SP_OFFSET \
245 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
246 #define CONFIG_SYS_INIT_SP_ADDR \
247 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
248 
249 /* Environment organization */
250 #if defined (CONFIG_ENV_IS_IN_MMC)
251 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
252 #define CONFIG_SYS_MMC_ENV_DEV		0
253 #endif
254 
255 #define CONFIG_ENV_SIZE			(8 * 1024)
256 
257 #define CONFIG_ENV_IS_IN_SPI_FLASH
258 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
259 #define CONFIG_ENV_OFFSET		(768 * 1024)
260 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
261 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
262 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
263 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
264 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
265 #endif
266 
267 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
268