xref: /rk3399_rockchip-uboot/include/configs/cgtqmx6eval.h (revision 8183058188cd2d9424503b68de8606c5900ba74b)
1 /*
2  *
3  * Congatec Conga-QEVAl board configuration file.
4  *
5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8  * Leo Sartre, <lsartre@adeneo-embedded.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4122
19 
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
22 
23 #define CONFIG_BOARD_EARLY_INIT_F
24 #define CONFIG_MISC_INIT_R
25 
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE	       UART2_BASE
28 
29 /* MMC Configs */
30 #define CONFIG_FSL_ESDHC
31 #define CONFIG_FSL_USDHC
32 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
33 
34 #define CONFIG_MMC
35 #define CONFIG_CMD_MMC
36 #define CONFIG_GENERIC_MMC
37 #define CONFIG_BOUNCE_BUFFER
38 #define CONFIG_CMD_EXT2
39 #define CONFIG_CMD_FAT
40 #define CONFIG_DOS_PARTITION
41 
42 /* Miscellaneous commands */
43 #define CONFIG_CMD_BMODE
44 
45 /* allow to overwrite serial and ethaddr */
46 #define CONFIG_ENV_OVERWRITE
47 #define CONFIG_CONS_INDEX	       1
48 #define CONFIG_BAUDRATE			       115200
49 
50 /* Command definition */
51 
52 #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
53 
54 #define CONFIG_EXTRA_ENV_SETTINGS \
55 	"script=boot.scr\0" \
56 	"image=zImage\0" \
57 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
58 	"boot_dir=/boot\0" \
59 	"console=ttymxc1\0" \
60 	"fdt_high=0xffffffff\0" \
61 	"initrd_high=0xffffffff\0" \
62 	"fdt_addr=0x18000000\0" \
63 	"boot_fdt=try\0" \
64 	"mmcdev=1\0" \
65 	"mmcpart=1\0" \
66 	"mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
67 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
68 		"root=${mmcroot}\0" \
69 	"loadbootscript=" \
70 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
71 	"bootscript=echo Running bootscript from mmc ...; " \
72 		"source\0" \
73 	"loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
74 		"${boot_dir}/${image}\0" \
75 	"loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
76 		"${boot_dir}/${fdt_file}\0" \
77 	"mmcboot=echo Booting from mmc ...; " \
78 		"run mmcargs; " \
79 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
80 			"if run loadfdt; then " \
81 				"bootz ${loadaddr} - ${fdt_addr}; " \
82 			"else " \
83 				"if test ${boot_fdt} = try; then " \
84 					"bootz; " \
85 				"else " \
86 					"echo WARN: Cannot load the DT; " \
87 				"fi; " \
88 			"fi; " \
89 		"else " \
90 			"bootz; " \
91 		"fi;\0"
92 
93 #define CONFIG_BOOTCOMMAND \
94 	   "mmc dev ${mmcdev};" \
95 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
96 		   "if run loadbootscript; then " \
97 			   "run bootscript; " \
98 		   "else " \
99 			   "if run loadimage; then " \
100 				   "run mmcboot; " \
101 			   "else "\
102 				   "echo ERR: Fail to boot from mmc; " \
103 			   "fi; " \
104 		   "fi; " \
105 	   "else echo ERR: Fail to boot from mmc; fi"
106 
107 /* Miscellaneous configurable options */
108 #define CONFIG_SYS_LONGHELP
109 #define CONFIG_SYS_HUSH_PARSER
110 #define CONFIG_SYS_PROMPT	       "CGT-QMX6-Quad U-Boot > "
111 #define CONFIG_AUTO_COMPLETE
112 #define CONFIG_SYS_CBSIZE	       256
113 
114 /* Print Buffer Size */
115 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
116 #define CONFIG_SYS_MAXARGS	       16
117 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
118 
119 #define CONFIG_SYS_MEMTEST_START       0x10000000
120 #define CONFIG_SYS_MEMTEST_END	       0x10010000
121 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
122 
123 #define CONFIG_CMDLINE_EDITING
124 
125 /* Physical Memory Map */
126 #define CONFIG_NR_DRAM_BANKS	       1
127 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
128 #define PHYS_SDRAM_SIZE			       (1u * 1024 * 1024 * 1024)
129 
130 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
131 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
132 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
133 
134 #define CONFIG_SYS_INIT_SP_OFFSET \
135 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
136 #define CONFIG_SYS_INIT_SP_ADDR \
137 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
138 
139 /* Environment organization */
140 #define CONFIG_ENV_SIZE			(8 * 1024)
141 
142 #define CONFIG_ENV_IS_IN_MMC
143 
144 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
145 #define CONFIG_SYS_MMC_ENV_DEV		0
146 
147 #define CONFIG_OF_LIBFDT
148 #define CONFIG_CMD_BOOTZ
149 
150 #ifndef CONFIG_SYS_DCACHE_OFF
151 #define CONFIG_CMD_CACHE
152 #endif
153 
154 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
155