xref: /rk3399_rockchip-uboot/include/configs/cgtqmx6eval.h (revision 71bcdafe73255d6ef974e55f3d31cf27127871b5)
1 /*
2  *
3  * Congatec Conga-QEVAl board configuration file.
4  *
5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8  * Leo Sartre, <lsartre@adeneo-embedded.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4122
19 
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
22 
23 #define CONFIG_BOARD_EARLY_INIT_F
24 #define CONFIG_MISC_INIT_R
25 
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE	       UART2_BASE
28 
29 /* MMC Configs */
30 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
31 
32 /* SPI NOR */
33 #define CONFIG_CMD_SF
34 #define CONFIG_SPI_FLASH
35 #define CONFIG_SPI_FLASH_STMICRO
36 #define CONFIG_SPI_FLASH_SST
37 #define CONFIG_MXC_SPI
38 #define CONFIG_SF_DEFAULT_BUS		0
39 #define CONFIG_SF_DEFAULT_SPEED		20000000
40 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
41 
42 /* Miscellaneous commands */
43 #define CONFIG_CMD_BMODE
44 
45 /* Thermal support */
46 #define CONFIG_IMX_THERMAL
47 
48 /* I2C Configs */
49 #define CONFIG_CMD_I2C
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
53 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
54 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
55 #define CONFIG_SYS_I2C_SPEED		  100000
56 
57 /* PMIC */
58 #define CONFIG_POWER
59 #define CONFIG_POWER_I2C
60 #define CONFIG_POWER_PFUZE100
61 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
62 
63 /* USB Configs */
64 #define CONFIG_CMD_USB
65 #define CONFIG_CMD_FAT
66 #define CONFIG_USB_EHCI
67 #define CONFIG_USB_EHCI_MX6
68 #define CONFIG_USB_STORAGE
69 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
70 #define CONFIG_USB_HOST_ETHER
71 #define CONFIG_USB_ETHER_ASIX
72 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
73 #define CONFIG_MXC_USB_FLAGS	0
74 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
75 #define CONFIG_USB_KEYBOARD
76 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
77 
78 #define CONFIG_CI_UDC
79 #define CONFIG_USBD_HS
80 #define CONFIG_USB_GADGET_DUALSPEED
81 
82 #define CONFIG_USB_GADGET
83 #define CONFIG_CMD_USB_MASS_STORAGE
84 #define CONFIG_USB_FUNCTION_MASS_STORAGE
85 #define CONFIG_USB_GADGET_DOWNLOAD
86 #define CONFIG_USB_GADGET_VBUS_DRAW	2
87 
88 #define CONFIG_G_DNL_VENDOR_NUM		0x0525
89 #define CONFIG_G_DNL_PRODUCT_NUM	0xa4a5
90 #define CONFIG_G_DNL_MANUFACTURER	"Congatec"
91 
92 /* Framebuffer */
93 #define CONFIG_VIDEO
94 #define CONFIG_VIDEO_IPUV3
95 #define CONFIG_CFB_CONSOLE
96 #define CONFIG_VGA_AS_SINGLE_DEVICE
97 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
98 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
99 #define CONFIG_VIDEO_BMP_RLE8
100 #define CONFIG_SPLASH_SCREEN
101 #define CONFIG_SPLASH_SCREEN_ALIGN
102 #define CONFIG_BMP_16BPP
103 #define CONFIG_VIDEO_LOGO
104 #define CONFIG_VIDEO_BMP_LOGO
105 #ifdef CONFIG_MX6DL
106 #define CONFIG_IPUV3_CLK 198000000
107 #else
108 #define CONFIG_IPUV3_CLK 264000000
109 #endif
110 #define CONFIG_IMX_HDMI
111 
112 /* SATA */
113 #define CONFIG_CMD_SATA
114 #define CONFIG_DWC_AHSATA
115 #define CONFIG_SYS_SATA_MAX_DEVICE	1
116 #define CONFIG_DWC_AHSATA_PORT_ID	0
117 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
118 #define CONFIG_LBA48
119 #define CONFIG_LIBATA
120 
121 /* Ethernet */
122 #define CONFIG_CMD_PING
123 #define CONFIG_CMD_DHCP
124 #define CONFIG_CMD_MII
125 #define CONFIG_FEC_MXC
126 #define CONFIG_MII
127 #define IMX_FEC_BASE			ENET_BASE_ADDR
128 #define CONFIG_FEC_XCV_TYPE		RGMII
129 #define CONFIG_ETHPRIME			"FEC"
130 #define CONFIG_FEC_MXC_PHYADDR		6
131 #define CONFIG_PHYLIB
132 #define CONFIG_PHY_ATHEROS
133 
134 /* Command definition */
135 
136 #define CONFIG_MXC_UART_BASE	UART2_BASE
137 #define CONFIG_CONSOLE_DEV	"ttymxc1"
138 #define CONFIG_MMCROOT		"/dev/mmcblk0p2"
139 #define CONFIG_SYS_MMC_ENV_DEV		0
140 
141 #define CONFIG_EXTRA_ENV_SETTINGS \
142 	"script=boot.scr\0" \
143 	"image=zImage\0" \
144 	"fdtfile=imx6q-qmx6.dtb\0" \
145 	"fdt_addr_r=0x18000000\0" \
146 	"boot_fdt=try\0" \
147 	"ip_dyn=yes\0" \
148 	"console=" CONFIG_CONSOLE_DEV "\0" \
149 	"bootm_size=0x10000000\0" \
150 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
151 	"mmcpart=1\0" \
152 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
153 	"update_sd_firmware=" \
154 		"if test ${ip_dyn} = yes; then " \
155 			"setenv get_cmd dhcp; " \
156 		"else " \
157 			"setenv get_cmd tftp; " \
158 		"fi; " \
159 		"if mmc dev ${mmcdev}; then "	\
160 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
161 				"setexpr fw_sz ${filesize} / 0x200; " \
162 				"setexpr fw_sz ${fw_sz} + 1; "	\
163 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
164 			"fi; "	\
165 		"fi\0" \
166 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
167 		"root=${mmcroot}\0" \
168 	"loadbootscript=" \
169 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
170 	"bootscript=echo Running bootscript from mmc ...; " \
171 		"source\0" \
172 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
173 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
174 	"mmcboot=echo Booting from mmc ...; " \
175 		"run mmcargs; " \
176 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
177 			"if run loadfdt; then " \
178 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
179 			"else " \
180 				"if test ${boot_fdt} = try; then " \
181 					"bootz; " \
182 				"else " \
183 					"echo WARN: Cannot load the DT; " \
184 				"fi; " \
185 			"fi; " \
186 		"else " \
187 			"bootz; " \
188 		"fi;\0" \
189 	"netargs=setenv bootargs console=${console},${baudrate} " \
190 		"root=/dev/nfs " \
191 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
192 	"netboot=echo Booting from net ...; " \
193 		"run netargs; " \
194 		"if test ${ip_dyn} = yes; then " \
195 			"setenv get_cmd dhcp; " \
196 		"else " \
197 			"setenv get_cmd tftp; " \
198 		"fi; " \
199 		"${get_cmd} ${image}; " \
200 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
201 			"if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
202 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
203 			"else " \
204 				"if test ${boot_fdt} = try; then " \
205 					"bootz; " \
206 				"else " \
207 					"echo WARN: Cannot load the DT; " \
208 				"fi; " \
209 			"fi; " \
210 		"else " \
211 			"bootz; " \
212 		"fi;\0" \
213 	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
214 
215 #define CONFIG_BOOTCOMMAND \
216 	"run spilock;"	    \
217 	"mmc dev ${mmcdev};" \
218 	"if mmc rescan; then " \
219 		"if run loadbootscript; then " \
220 		"run bootscript; " \
221 		"else " \
222 			"if run loadimage; then " \
223 				"run mmcboot; " \
224 			"else run netboot; " \
225 			"fi; " \
226 		"fi; " \
227 	"else run netboot; fi"
228 
229 #define CONFIG_SYS_MEMTEST_START       0x10000000
230 #define CONFIG_SYS_MEMTEST_END	       0x10010000
231 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
232 
233 /* Physical Memory Map */
234 #define CONFIG_NR_DRAM_BANKS	       1
235 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
236 #define PHYS_SDRAM_SIZE			       (1u * 1024 * 1024 * 1024)
237 
238 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
239 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
240 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
241 
242 #define CONFIG_SYS_INIT_SP_OFFSET \
243 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
244 #define CONFIG_SYS_INIT_SP_ADDR \
245 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
246 
247 /* Environment organization */
248 #define CONFIG_ENV_SIZE			(8 * 1024)
249 
250 #define CONFIG_ENV_IS_IN_MMC
251 
252 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
253 #define CONFIG_SYS_MMC_ENV_DEV		0
254 
255 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
256