1 /* 2 * 3 * Congatec Conga-QEVAl board configuration file. 4 * 5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 8 * Leo Sartre, <lsartre@adeneo-embedded.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_CGTQMX6EVAL_H 14 #define __CONFIG_CGTQMX6EVAL_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4122 19 20 /* Size of malloc() pool */ 21 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 22 23 #define CONFIG_BOARD_EARLY_INIT_F 24 #define CONFIG_MISC_INIT_R 25 26 #define CONFIG_MXC_UART 27 #define CONFIG_MXC_UART_BASE UART2_BASE 28 29 /* MMC Configs */ 30 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 31 32 /* Miscellaneous commands */ 33 #define CONFIG_CMD_BMODE 34 35 /* Thermal support */ 36 #define CONFIG_IMX6_THERMAL 37 38 #define CONFIG_CMD_FUSE 39 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) 40 #define CONFIG_MXC_OCOTP 41 #endif 42 43 /* I2C Configs */ 44 #define CONFIG_CMD_I2C 45 #define CONFIG_SYS_I2C 46 #define CONFIG_SYS_I2C_MXC 47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 48 #define CONFIG_SYS_I2C_SPEED 100000 49 50 /* PMIC */ 51 #define CONFIG_POWER 52 #define CONFIG_POWER_I2C 53 #define CONFIG_POWER_PFUZE100 54 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 55 56 /* USB Configs */ 57 #define CONFIG_CMD_USB 58 #define CONFIG_CMD_FAT 59 #define CONFIG_USB_EHCI 60 #define CONFIG_USB_EHCI_MX6 61 #define CONFIG_USB_STORAGE 62 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 63 #define CONFIG_USB_HOST_ETHER 64 #define CONFIG_USB_ETHER_ASIX 65 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 66 #define CONFIG_MXC_USB_FLAGS 0 67 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 68 #define CONFIG_USB_KEYBOARD 69 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 70 71 /* Framebuffer */ 72 #define CONFIG_VIDEO 73 #define CONFIG_VIDEO_IPUV3 74 #define CONFIG_CFB_CONSOLE 75 #define CONFIG_VGA_AS_SINGLE_DEVICE 76 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 77 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 78 #define CONFIG_VIDEO_BMP_RLE8 79 #define CONFIG_SPLASH_SCREEN 80 #define CONFIG_SPLASH_SCREEN_ALIGN 81 #define CONFIG_BMP_16BPP 82 #define CONFIG_VIDEO_LOGO 83 #define CONFIG_VIDEO_BMP_LOGO 84 #ifdef CONFIG_MX6DL 85 #define CONFIG_IPUV3_CLK 198000000 86 #else 87 #define CONFIG_IPUV3_CLK 264000000 88 #endif 89 #define CONFIG_IMX_HDMI 90 91 /* SATA */ 92 #define CONFIG_CMD_SATA 93 #define CONFIG_DWC_AHSATA 94 #define CONFIG_SYS_SATA_MAX_DEVICE 1 95 #define CONFIG_DWC_AHSATA_PORT_ID 0 96 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 97 #define CONFIG_LBA48 98 #define CONFIG_LIBATA 99 100 #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" 101 102 #define CONFIG_EXTRA_ENV_SETTINGS \ 103 "script=boot.scr\0" \ 104 "image=zImage\0" \ 105 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 106 "boot_dir=/boot\0" \ 107 "console=ttymxc1\0" \ 108 "fdt_high=0xffffffff\0" \ 109 "initrd_high=0xffffffff\0" \ 110 "fdt_addr=0x18000000\0" \ 111 "boot_fdt=try\0" \ 112 "mmcdev=1\0" \ 113 "mmcpart=1\0" \ 114 "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \ 115 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 116 "root=${mmcroot}\0" \ 117 "loadbootscript=" \ 118 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 119 "bootscript=echo Running bootscript from mmc ...; " \ 120 "source\0" \ 121 "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ 122 "${boot_dir}/${image}\0" \ 123 "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \ 124 "${boot_dir}/${fdt_file}\0" \ 125 "mmcboot=echo Booting from mmc ...; " \ 126 "run mmcargs; " \ 127 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 128 "if run loadfdt; then " \ 129 "bootz ${loadaddr} - ${fdt_addr}; " \ 130 "else " \ 131 "if test ${boot_fdt} = try; then " \ 132 "bootz; " \ 133 "else " \ 134 "echo WARN: Cannot load the DT; " \ 135 "fi; " \ 136 "fi; " \ 137 "else " \ 138 "bootz; " \ 139 "fi;\0" 140 141 #define CONFIG_BOOTCOMMAND \ 142 "mmc dev ${mmcdev};" \ 143 "mmc dev ${mmcdev}; if mmc rescan; then " \ 144 "if run loadbootscript; then " \ 145 "run bootscript; " \ 146 "else " \ 147 "if run loadimage; then " \ 148 "run mmcboot; " \ 149 "else "\ 150 "echo ERR: Fail to boot from mmc; " \ 151 "fi; " \ 152 "fi; " \ 153 "else echo ERR: Fail to boot from mmc; fi" 154 155 #define CONFIG_SYS_MEMTEST_START 0x10000000 156 #define CONFIG_SYS_MEMTEST_END 0x10010000 157 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 158 159 /* Physical Memory Map */ 160 #define CONFIG_NR_DRAM_BANKS 1 161 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 162 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 163 164 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 165 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 166 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 167 168 #define CONFIG_SYS_INIT_SP_OFFSET \ 169 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 170 #define CONFIG_SYS_INIT_SP_ADDR \ 171 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 172 173 /* Environment organization */ 174 #define CONFIG_ENV_SIZE (8 * 1024) 175 176 #define CONFIG_ENV_IS_IN_MMC 177 178 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 179 #define CONFIG_SYS_MMC_ENV_DEV 0 180 181 #endif /* __CONFIG_CGTQMX6EVAL_H */ 182