xref: /rk3399_rockchip-uboot/include/configs/cgtqmx6eval.h (revision 64d6ac5bc4a9bf8839e516959b35150ac8a0eb84)
1 /*
2  *
3  * Congatec Conga-QEVAl board configuration file.
4  *
5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8  * Leo Sartre, <lsartre@adeneo-embedded.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4122
19 
20 #ifdef CONFIG_SPL
21 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
22 #define CONFIG_SPL_SPI_LOAD
23 #include "imx6_spl.h"
24 #endif
25 
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
28 
29 #define CONFIG_MISC_INIT_R
30 
31 #define CONFIG_MXC_UART
32 #define CONFIG_MXC_UART_BASE	       UART2_BASE
33 
34 /* MMC Configs */
35 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
36 
37 /* SPI NOR */
38 #define CONFIG_SPI_FLASH
39 #define CONFIG_SPI_FLASH_STMICRO
40 #define CONFIG_SPI_FLASH_SST
41 #define CONFIG_MXC_SPI
42 #define CONFIG_SF_DEFAULT_BUS		0
43 #define CONFIG_SF_DEFAULT_SPEED		20000000
44 #define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
45 
46 /* Thermal support */
47 #define CONFIG_IMX_THERMAL
48 
49 /* I2C Configs */
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
53 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
54 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
55 #define CONFIG_SYS_I2C_SPEED		  100000
56 
57 /* PMIC */
58 #define CONFIG_POWER
59 #define CONFIG_POWER_I2C
60 #define CONFIG_POWER_PFUZE100
61 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
62 
63 /* USB Configs */
64 #define CONFIG_USB_EHCI_MX6
65 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
66 #define CONFIG_USB_HOST_ETHER
67 #define CONFIG_USB_ETHER_ASIX
68 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
69 #define CONFIG_MXC_USB_FLAGS	0
70 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
71 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
72 
73 #define CONFIG_USBD_HS
74 
75 #define CONFIG_USB_FUNCTION_MASS_STORAGE
76 
77 #define CONFIG_USB_FUNCTION_FASTBOOT
78 #define CONFIG_CMD_FASTBOOT
79 #define CONFIG_ANDROID_BOOT_IMAGE
80 #define CONFIG_FASTBOOT_BUF_ADDR   CONFIG_SYS_LOAD_ADDR
81 #define CONFIG_FASTBOOT_BUF_SIZE   0x07000000
82 
83 /* Framebuffer */
84 #define CONFIG_VIDEO_IPUV3
85 #define CONFIG_VIDEO_BMP_RLE8
86 #define CONFIG_SPLASH_SCREEN
87 #define CONFIG_SPLASH_SCREEN_ALIGN
88 #define CONFIG_BMP_16BPP
89 #define CONFIG_VIDEO_LOGO
90 #define CONFIG_VIDEO_BMP_LOGO
91 #ifdef CONFIG_MX6DL
92 #define CONFIG_IPUV3_CLK 198000000
93 #else
94 #define CONFIG_IPUV3_CLK 264000000
95 #endif
96 #define CONFIG_IMX_HDMI
97 
98 /* SATA */
99 #define CONFIG_CMD_SATA
100 #define CONFIG_DWC_AHSATA
101 #define CONFIG_SYS_SATA_MAX_DEVICE	1
102 #define CONFIG_DWC_AHSATA_PORT_ID	0
103 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
104 #define CONFIG_LBA48
105 #define CONFIG_LIBATA
106 
107 /* Ethernet */
108 #define CONFIG_FEC_MXC
109 #define CONFIG_MII
110 #define IMX_FEC_BASE			ENET_BASE_ADDR
111 #define CONFIG_FEC_XCV_TYPE		RGMII
112 #define CONFIG_ETHPRIME			"FEC"
113 #define CONFIG_FEC_MXC_PHYADDR		6
114 #define CONFIG_PHYLIB
115 #define CONFIG_PHY_ATHEROS
116 
117 /* Command definition */
118 
119 #define CONFIG_MXC_UART_BASE	UART2_BASE
120 #define CONSOLE_DEV	"ttymxc1"
121 #define CONFIG_MMCROOT		"/dev/mmcblk0p2"
122 #define CONFIG_SYS_MMC_ENV_DEV		0
123 
124 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
125 #define CONFIG_EXTRA_ENV_SETTINGS \
126 	"script=boot.scr\0" \
127 	"image=zImage\0" \
128 	"fdtfile=undefined\0" \
129 	"fdt_addr_r=0x18000000\0" \
130 	"boot_fdt=try\0" \
131 	"ip_dyn=yes\0" \
132 	"console=" CONSOLE_DEV "\0" \
133 	"dfuspi=dfu 0 sf 0:0:10000000:0\0" \
134 	"dfu_alt_info_spl=spl raw 0x400\0" \
135 	"dfu_alt_info_img=u-boot raw 0x10000\0" \
136 	"dfu_alt_info=spl raw 0x400\0" \
137 	"bootm_size=0x10000000\0" \
138 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
139 	"mmcpart=1\0" \
140 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
141 	"update_sd_firmware=" \
142 		"if test ${ip_dyn} = yes; then " \
143 			"setenv get_cmd dhcp; " \
144 		"else " \
145 			"setenv get_cmd tftp; " \
146 		"fi; " \
147 		"if mmc dev ${mmcdev}; then "	\
148 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
149 				"setexpr fw_sz ${filesize} / 0x200; " \
150 				"setexpr fw_sz ${fw_sz} + 1; "	\
151 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
152 			"fi; "	\
153 		"fi\0" \
154 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
155 		"root=${mmcroot}\0" \
156 	"loadbootscript=" \
157 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
158 	"bootscript=echo Running bootscript from mmc ...; " \
159 		"source\0" \
160 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
161 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
162 	"mmcboot=echo Booting from mmc ...; " \
163 		"run mmcargs; " \
164 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
165 			"if run loadfdt; then " \
166 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
167 			"else " \
168 				"if test ${boot_fdt} = try; then " \
169 					"bootz; " \
170 				"else " \
171 					"echo WARN: Cannot load the DT; " \
172 				"fi; " \
173 			"fi; " \
174 		"else " \
175 			"bootz; " \
176 		"fi;\0" \
177 	"findfdt="\
178 		"if test $board_rev = MX6Q ; then " \
179 			"setenv fdtfile imx6q-qmx6.dtb; fi; " \
180 		"if test $board_rev = MX6DL ; then " \
181 			"setenv fdtfile imx6dl-qmx6.dtb; fi; " \
182 		"if test $fdtfile = undefined; then " \
183 			"echo WARNING: Could not determine dtb to use; fi; \0" \
184 	"netargs=setenv bootargs console=${console},${baudrate} " \
185 		"root=/dev/nfs " \
186 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
187 	"netboot=echo Booting from net ...; " \
188 		"run netargs; " \
189 		"if test ${ip_dyn} = yes; then " \
190 			"setenv get_cmd dhcp; " \
191 		"else " \
192 			"setenv get_cmd tftp; " \
193 		"fi; " \
194 		"${get_cmd} ${image}; " \
195 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
196 			"if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
197 				"bootz ${loadaddr} - ${fdt_addr_r}; " \
198 			"else " \
199 				"if test ${boot_fdt} = try; then " \
200 					"bootz; " \
201 				"else " \
202 					"echo WARN: Cannot load the DT; " \
203 				"fi; " \
204 			"fi; " \
205 		"else " \
206 			"bootz; " \
207 		"fi;\0" \
208 	"spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
209 
210 #define CONFIG_BOOTCOMMAND \
211 	"run spilock;"	    \
212 	"run findfdt; "	\
213 	"mmc dev ${mmcdev};" \
214 	"if mmc rescan; then " \
215 		"if run loadbootscript; then " \
216 		"run bootscript; " \
217 		"else " \
218 			"if run loadimage; then " \
219 				"run mmcboot; " \
220 			"else run netboot; " \
221 			"fi; " \
222 		"fi; " \
223 	"else run netboot; fi"
224 
225 #define CONFIG_SYS_MEMTEST_START       0x10000000
226 #define CONFIG_SYS_MEMTEST_END	       0x10010000
227 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
228 
229 /* Physical Memory Map */
230 #define CONFIG_NR_DRAM_BANKS	       1
231 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
232 
233 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
234 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
235 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
236 
237 #define CONFIG_SYS_INIT_SP_OFFSET \
238 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
239 #define CONFIG_SYS_INIT_SP_ADDR \
240 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
241 
242 /* Environment organization */
243 #if defined (CONFIG_ENV_IS_IN_MMC)
244 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
245 #define CONFIG_SYS_MMC_ENV_DEV		0
246 #endif
247 
248 #define CONFIG_ENV_SIZE			(8 * 1024)
249 
250 #define CONFIG_ENV_IS_IN_SPI_FLASH
251 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
252 #define CONFIG_ENV_OFFSET		(768 * 1024)
253 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
254 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
255 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
256 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
257 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
258 #endif
259 
260 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
261