1 /* 2 * 3 * Congatec Conga-QEVAl board configuration file. 4 * 5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 8 * Leo Sartre, <lsartre@adeneo-embedded.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_CGTQMX6EVAL_H 14 #define __CONFIG_CGTQMX6EVAL_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4122 19 20 /* Size of malloc() pool */ 21 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 22 23 #define CONFIG_BOARD_EARLY_INIT_F 24 #define CONFIG_MISC_INIT_R 25 26 #define CONFIG_MXC_UART 27 #define CONFIG_MXC_UART_BASE UART2_BASE 28 29 /* MMC Configs */ 30 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 31 32 /* Miscellaneous commands */ 33 #define CONFIG_CMD_BMODE 34 35 /* Thermal support */ 36 #define CONFIG_IMX6_THERMAL 37 38 #define CONFIG_CMD_FUSE 39 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) 40 #define CONFIG_MXC_OCOTP 41 #endif 42 43 /* I2C Configs */ 44 #define CONFIG_CMD_I2C 45 #define CONFIG_SYS_I2C 46 #define CONFIG_SYS_I2C_MXC 47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 48 #define CONFIG_SYS_I2C_SPEED 100000 49 50 /* PMIC */ 51 #define CONFIG_POWER 52 #define CONFIG_POWER_I2C 53 #define CONFIG_POWER_PFUZE100 54 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 55 56 #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" 57 58 #define CONFIG_EXTRA_ENV_SETTINGS \ 59 "script=boot.scr\0" \ 60 "image=zImage\0" \ 61 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 62 "boot_dir=/boot\0" \ 63 "console=ttymxc1\0" \ 64 "fdt_high=0xffffffff\0" \ 65 "initrd_high=0xffffffff\0" \ 66 "fdt_addr=0x18000000\0" \ 67 "boot_fdt=try\0" \ 68 "mmcdev=1\0" \ 69 "mmcpart=1\0" \ 70 "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \ 71 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 72 "root=${mmcroot}\0" \ 73 "loadbootscript=" \ 74 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 75 "bootscript=echo Running bootscript from mmc ...; " \ 76 "source\0" \ 77 "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ 78 "${boot_dir}/${image}\0" \ 79 "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \ 80 "${boot_dir}/${fdt_file}\0" \ 81 "mmcboot=echo Booting from mmc ...; " \ 82 "run mmcargs; " \ 83 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 84 "if run loadfdt; then " \ 85 "bootz ${loadaddr} - ${fdt_addr}; " \ 86 "else " \ 87 "if test ${boot_fdt} = try; then " \ 88 "bootz; " \ 89 "else " \ 90 "echo WARN: Cannot load the DT; " \ 91 "fi; " \ 92 "fi; " \ 93 "else " \ 94 "bootz; " \ 95 "fi;\0" 96 97 #define CONFIG_BOOTCOMMAND \ 98 "mmc dev ${mmcdev};" \ 99 "mmc dev ${mmcdev}; if mmc rescan; then " \ 100 "if run loadbootscript; then " \ 101 "run bootscript; " \ 102 "else " \ 103 "if run loadimage; then " \ 104 "run mmcboot; " \ 105 "else "\ 106 "echo ERR: Fail to boot from mmc; " \ 107 "fi; " \ 108 "fi; " \ 109 "else echo ERR: Fail to boot from mmc; fi" 110 111 #define CONFIG_SYS_MEMTEST_START 0x10000000 112 #define CONFIG_SYS_MEMTEST_END 0x10010000 113 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 114 115 /* Physical Memory Map */ 116 #define CONFIG_NR_DRAM_BANKS 1 117 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 118 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 119 120 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 121 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 122 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 123 124 #define CONFIG_SYS_INIT_SP_OFFSET \ 125 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 126 #define CONFIG_SYS_INIT_SP_ADDR \ 127 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 128 129 /* Environment organization */ 130 #define CONFIG_ENV_SIZE (8 * 1024) 131 132 #define CONFIG_ENV_IS_IN_MMC 133 134 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 135 #define CONFIG_SYS_MMC_ENV_DEV 0 136 137 #endif /* __CONFIG_CGTQMX6EVAL_H */ 138