xref: /rk3399_rockchip-uboot/include/configs/cgtqmx6eval.h (revision 3b1f681131149b5f62602f582a7e60b0185a2a49)
1 /*
2  *
3  * Congatec Conga-QEVAl board configuration file.
4  *
5  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6  * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8  * Leo Sartre, <lsartre@adeneo-embedded.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4122
19 
20 #define CONFIG_CMDLINE_TAG
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
23 #define CONFIG_REVISION_TAG
24 
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
27 
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_MISC_INIT_R
30 #define CONFIG_MXC_GPIO
31 
32 #define CONFIG_MXC_UART
33 #define CONFIG_MXC_UART_BASE	       UART2_BASE
34 
35 /* MMC Configs */
36 #define CONFIG_FSL_ESDHC
37 #define CONFIG_FSL_USDHC
38 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
39 
40 #define CONFIG_MMC
41 #define CONFIG_CMD_MMC
42 #define CONFIG_GENERIC_MMC
43 #define CONFIG_BOUNCE_BUFFER
44 #define CONFIG_CMD_EXT2
45 #define CONFIG_CMD_FAT
46 #define CONFIG_DOS_PARTITION
47 
48 /* Miscellaneous commands */
49 #define CONFIG_CMD_BMODE
50 
51 /* allow to overwrite serial and ethaddr */
52 #define CONFIG_ENV_OVERWRITE
53 #define CONFIG_CONS_INDEX	       1
54 #define CONFIG_BAUDRATE			       115200
55 
56 /* Command definition */
57 
58 #define CONFIG_BOOTDELAY	       3
59 
60 #define CONFIG_LOADADDR			       0x12000000
61 #define CONFIG_SYS_TEXT_BASE	       0x17800000
62 
63 #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
64 
65 #define CONFIG_EXTRA_ENV_SETTINGS \
66 	"script=boot.scr\0" \
67 	"image=zImage\0" \
68 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
69 	"boot_dir=/boot\0" \
70 	"console=ttymxc1\0" \
71 	"fdt_high=0xffffffff\0" \
72 	"initrd_high=0xffffffff\0" \
73 	"fdt_addr=0x18000000\0" \
74 	"boot_fdt=try\0" \
75 	"mmcdev=1\0" \
76 	"mmcpart=1\0" \
77 	"mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
78 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
79 		"root=${mmcroot}\0" \
80 	"loadbootscript=" \
81 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
82 	"bootscript=echo Running bootscript from mmc ...; " \
83 		"source\0" \
84 	"loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
85 		"${boot_dir}/${image}\0" \
86 	"loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
87 		"${boot_dir}/${fdt_file}\0" \
88 	"mmcboot=echo Booting from mmc ...; " \
89 		"run mmcargs; " \
90 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
91 			"if run loadfdt; then " \
92 				"bootz ${loadaddr} - ${fdt_addr}; " \
93 			"else " \
94 				"if test ${boot_fdt} = try; then " \
95 					"bootz; " \
96 				"else " \
97 					"echo WARN: Cannot load the DT; " \
98 				"fi; " \
99 			"fi; " \
100 		"else " \
101 			"bootz; " \
102 		"fi;\0"
103 
104 #define CONFIG_BOOTCOMMAND \
105 	   "mmc dev ${mmcdev};" \
106 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
107 		   "if run loadbootscript; then " \
108 			   "run bootscript; " \
109 		   "else " \
110 			   "if run loadimage; then " \
111 				   "run mmcboot; " \
112 			   "else "\
113 				   "echo ERR: Fail to boot from mmc; " \
114 			   "fi; " \
115 		   "fi; " \
116 	   "else echo ERR: Fail to boot from mmc; fi"
117 
118 /* Miscellaneous configurable options */
119 #define CONFIG_SYS_LONGHELP
120 #define CONFIG_SYS_HUSH_PARSER
121 #define CONFIG_SYS_PROMPT	       "CGT-QMX6-Quad U-Boot > "
122 #define CONFIG_AUTO_COMPLETE
123 #define CONFIG_SYS_CBSIZE	       256
124 
125 /* Print Buffer Size */
126 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
127 #define CONFIG_SYS_MAXARGS	       16
128 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
129 
130 #define CONFIG_SYS_MEMTEST_START       0x10000000
131 #define CONFIG_SYS_MEMTEST_END	       0x10010000
132 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
133 
134 #define CONFIG_SYS_LOAD_ADDR	       CONFIG_LOADADDR
135 
136 #define CONFIG_CMDLINE_EDITING
137 
138 /* Physical Memory Map */
139 #define CONFIG_NR_DRAM_BANKS	       1
140 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
141 #define PHYS_SDRAM_SIZE			       (1u * 1024 * 1024 * 1024)
142 
143 #define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
144 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
145 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
146 
147 #define CONFIG_SYS_INIT_SP_OFFSET \
148 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
149 #define CONFIG_SYS_INIT_SP_ADDR \
150 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
151 
152 /* Environment organization */
153 #define CONFIG_ENV_SIZE			(8 * 1024)
154 
155 #define CONFIG_ENV_IS_IN_MMC
156 
157 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
158 #define CONFIG_SYS_MMC_ENV_DEV		0
159 
160 #define CONFIG_OF_LIBFDT
161 #define CONFIG_CMD_BOOTZ
162 
163 #ifndef CONFIG_SYS_DCACHE_OFF
164 #define CONFIG_CMD_CACHE
165 #endif
166 
167 #endif			       /* __CONFIG_CGTQMX6EVAL_H */
168