1*bf9012b8SÁlvaro Fernández Rojas /* 2*bf9012b8SÁlvaro Fernández Rojas * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> 3*bf9012b8SÁlvaro Fernández Rojas * 4*bf9012b8SÁlvaro Fernández Rojas * SPDX-License-Identifier: GPL-2.0+ 5*bf9012b8SÁlvaro Fernández Rojas */ 6*bf9012b8SÁlvaro Fernández Rojas 7*bf9012b8SÁlvaro Fernández Rojas #ifndef __CONFIG_BMIPS_BCM6348_H 8*bf9012b8SÁlvaro Fernández Rojas #define __CONFIG_BMIPS_BCM6348_H 9*bf9012b8SÁlvaro Fernández Rojas 10*bf9012b8SÁlvaro Fernández Rojas /* CPU */ 11*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_MIPS_TIMER_FREQ 128000000 12*bf9012b8SÁlvaro Fernández Rojas 13*bf9012b8SÁlvaro Fernández Rojas /* RAM */ 14*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_NR_DRAM_BANKS 1 15*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_SDRAM_BASE 0x80000000 16*bf9012b8SÁlvaro Fernández Rojas 17*bf9012b8SÁlvaro Fernández Rojas /* U-Boot */ 18*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 19*bf9012b8SÁlvaro Fernández Rojas 20*bf9012b8SÁlvaro Fernández Rojas #if defined(CONFIG_BMIPS_BOOT_RAM) 21*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SKIP_LOWLEVEL_INIT 22*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_INIT_SP_OFFSET 0x2000 23*bf9012b8SÁlvaro Fernández Rojas #endif 24*bf9012b8SÁlvaro Fernández Rojas 25*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_FLASH_BASE 0xbfc00000 26*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_FLASH_EMPTY_INFO 27*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_FLASH_PROTECTION 28*bf9012b8SÁlvaro Fernández Rojas #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 29*bf9012b8SÁlvaro Fernández Rojas 30*bf9012b8SÁlvaro Fernández Rojas #endif /* __CONFIG_BMIPS_BCM6348_H */ 31