1*6a235bb8SÁlvaro Fernández Rojas /* 2*6a235bb8SÁlvaro Fernández Rojas * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> 3*6a235bb8SÁlvaro Fernández Rojas * 4*6a235bb8SÁlvaro Fernández Rojas * SPDX-License-Identifier: GPL-2.0+ 5*6a235bb8SÁlvaro Fernández Rojas */ 6*6a235bb8SÁlvaro Fernández Rojas 7*6a235bb8SÁlvaro Fernández Rojas #ifndef __CONFIG_BMIPS_BCM63268_H 8*6a235bb8SÁlvaro Fernández Rojas #define __CONFIG_BMIPS_BCM63268_H 9*6a235bb8SÁlvaro Fernández Rojas 10*6a235bb8SÁlvaro Fernández Rojas /* CPU */ 11*6a235bb8SÁlvaro Fernández Rojas #define CONFIG_SYS_MIPS_TIMER_FREQ 200000000 12*6a235bb8SÁlvaro Fernández Rojas 13*6a235bb8SÁlvaro Fernández Rojas /* RAM */ 14*6a235bb8SÁlvaro Fernández Rojas #define CONFIG_NR_DRAM_BANKS 1 15*6a235bb8SÁlvaro Fernández Rojas #define CONFIG_SYS_SDRAM_BASE 0x80000000 16*6a235bb8SÁlvaro Fernández Rojas 17*6a235bb8SÁlvaro Fernández Rojas /* U-Boot */ 18*6a235bb8SÁlvaro Fernández Rojas #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 19*6a235bb8SÁlvaro Fernández Rojas 20*6a235bb8SÁlvaro Fernández Rojas #if defined(CONFIG_BMIPS_BOOT_RAM) 21*6a235bb8SÁlvaro Fernández Rojas #define CONFIG_SKIP_LOWLEVEL_INIT 22*6a235bb8SÁlvaro Fernández Rojas #define CONFIG_SYS_INIT_SP_OFFSET 0x2000 23*6a235bb8SÁlvaro Fernández Rojas #endif 24*6a235bb8SÁlvaro Fernández Rojas 25*6a235bb8SÁlvaro Fernández Rojas #endif /* __CONFIG_BMIPS_BCM63268_H */ 26