1*43486e4cSSteve Rae /* 2*43486e4cSSteve Rae * Copyright 2013 Broadcom Corporation. 3*43486e4cSSteve Rae * 4*43486e4cSSteve Rae * SPDX-License-Identifier: GPL-2.0+ 5*43486e4cSSteve Rae */ 6*43486e4cSSteve Rae 7*43486e4cSSteve Rae #ifndef __BCM23550_W1D_H 8*43486e4cSSteve Rae #define __BCM23550_W1D_H 9*43486e4cSSteve Rae 10*43486e4cSSteve Rae #include <linux/sizes.h> 11*43486e4cSSteve Rae #include <asm/arch/sysmap.h> 12*43486e4cSSteve Rae 13*43486e4cSSteve Rae /* CPU, chip, mach, etc */ 14*43486e4cSSteve Rae #define CONFIG_KONA 15*43486e4cSSteve Rae #define CONFIG_SKIP_LOWLEVEL_INIT 16*43486e4cSSteve Rae #define CONFIG_KONA_RESET_S 17*43486e4cSSteve Rae 18*43486e4cSSteve Rae /* 19*43486e4cSSteve Rae * Memory configuration 20*43486e4cSSteve Rae */ 21*43486e4cSSteve Rae #define CONFIG_SYS_TEXT_BASE 0x9f000000 22*43486e4cSSteve Rae 23*43486e4cSSteve Rae #define CONFIG_SYS_SDRAM_BASE 0x80000000 24*43486e4cSSteve Rae #define CONFIG_SYS_SDRAM_SIZE 0x20000000 25*43486e4cSSteve Rae #define CONFIG_NR_DRAM_BANKS 1 26*43486e4cSSteve Rae 27*43486e4cSSteve Rae #define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */ 28*43486e4cSSteve Rae #define CONFIG_STACKSIZE SZ_256K 29*43486e4cSSteve Rae 30*43486e4cSSteve Rae /* GPIO Driver */ 31*43486e4cSSteve Rae #define CONFIG_KONA_GPIO 32*43486e4cSSteve Rae 33*43486e4cSSteve Rae /* MMC/SD Driver */ 34*43486e4cSSteve Rae #define CONFIG_SDHCI 35*43486e4cSSteve Rae #define CONFIG_MMC_SDMA 36*43486e4cSSteve Rae #define CONFIG_KONA_SDHCI 37*43486e4cSSteve Rae #define CONFIG_MMC 38*43486e4cSSteve Rae #define CONFIG_GENERIC_MMC 39*43486e4cSSteve Rae 40*43486e4cSSteve Rae #define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR 41*43486e4cSSteve Rae #define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR 42*43486e4cSSteve Rae #define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR 43*43486e4cSSteve Rae #define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR 44*43486e4cSSteve Rae #define CONFIG_SYS_SDIO0_MAX_CLK 48000000 45*43486e4cSSteve Rae #define CONFIG_SYS_SDIO1_MAX_CLK 48000000 46*43486e4cSSteve Rae #define CONFIG_SYS_SDIO2_MAX_CLK 48000000 47*43486e4cSSteve Rae #define CONFIG_SYS_SDIO3_MAX_CLK 48000000 48*43486e4cSSteve Rae #define CONFIG_SYS_SDIO0 "sdio1" 49*43486e4cSSteve Rae #define CONFIG_SYS_SDIO1 "sdio2" 50*43486e4cSSteve Rae #define CONFIG_SYS_SDIO2 "sdio3" 51*43486e4cSSteve Rae #define CONFIG_SYS_SDIO3 "sdio4" 52*43486e4cSSteve Rae 53*43486e4cSSteve Rae /* I2C Driver */ 54*43486e4cSSteve Rae #define CONFIG_SYS_I2C 55*43486e4cSSteve Rae #define CONFIG_SYS_I2C_KONA 56*43486e4cSSteve Rae #define CONFIG_SYS_SPD_BUS_NUM 3 /* Start with PMU bus */ 57*43486e4cSSteve Rae #define CONFIG_SYS_MAX_I2C_BUS 4 58*43486e4cSSteve Rae #define CONFIG_SYS_I2C_BASE0 BSC1_BASE_ADDR 59*43486e4cSSteve Rae #define CONFIG_SYS_I2C_BASE1 BSC2_BASE_ADDR 60*43486e4cSSteve Rae #define CONFIG_SYS_I2C_BASE2 BSC3_BASE_ADDR 61*43486e4cSSteve Rae #define CONFIG_SYS_I2C_BASE3 PMU_BSC_BASE_ADDR 62*43486e4cSSteve Rae 63*43486e4cSSteve Rae /* Timer Driver */ 64*43486e4cSSteve Rae #define CONFIG_SYS_TIMER_RATE 32000 65*43486e4cSSteve Rae #define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */ 66*43486e4cSSteve Rae 67*43486e4cSSteve Rae /* Init functions */ 68*43486e4cSSteve Rae #define CONFIG_MISC_INIT_R /* board's misc_init_r function */ 69*43486e4cSSteve Rae 70*43486e4cSSteve Rae /* Some commands use this as the default load address */ 71*43486e4cSSteve Rae #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE 72*43486e4cSSteve Rae 73*43486e4cSSteve Rae /* No mtest functions as recommended */ 74*43486e4cSSteve Rae 75*43486e4cSSteve Rae /* 76*43486e4cSSteve Rae * This is the initial SP which is used only briefly for relocating the u-boot 77*43486e4cSSteve Rae * image to the top of SDRAM. After relocation u-boot moves the stack to the 78*43486e4cSSteve Rae * proper place. 79*43486e4cSSteve Rae */ 80*43486e4cSSteve Rae #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE 81*43486e4cSSteve Rae 82*43486e4cSSteve Rae /* Serial Info */ 83*43486e4cSSteve Rae #define CONFIG_SYS_NS16550_SERIAL 84*43486e4cSSteve Rae /* Post pad 3 bytes after each reg addr */ 85*43486e4cSSteve Rae #define CONFIG_SYS_NS16550_REG_SIZE (-4) 86*43486e4cSSteve Rae #define CONFIG_SYS_NS16550_CLK 13000000 87*43486e4cSSteve Rae #define CONFIG_CONS_INDEX 1 88*43486e4cSSteve Rae #define CONFIG_SYS_NS16550_COM1 0x3e000000 89*43486e4cSSteve Rae 90*43486e4cSSteve Rae #define CONFIG_BAUDRATE 115200 91*43486e4cSSteve Rae 92*43486e4cSSteve Rae /* must fit into GPT:u-boot-env partition */ 93*43486e4cSSteve Rae #define CONFIG_ENV_IS_IN_MMC 94*43486e4cSSteve Rae #define CONFIG_SYS_MMC_ENV_DEV 0 95*43486e4cSSteve Rae #define CONFIG_ENV_OFFSET (0x00011a00 * 512) 96*43486e4cSSteve Rae #define CONFIG_ENV_SIZE (8 * 512) 97*43486e4cSSteve Rae 98*43486e4cSSteve Rae #define CONFIG_SYS_NO_FLASH /* Not using NAND/NOR unmanaged flash */ 99*43486e4cSSteve Rae 100*43486e4cSSteve Rae /* console configuration */ 101*43486e4cSSteve Rae #define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ 102*43486e4cSSteve Rae #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 103*43486e4cSSteve Rae sizeof(CONFIG_SYS_PROMPT) + 16) /* Printbuffer size */ 104*43486e4cSSteve Rae #define CONFIG_SYS_MAXARGS 64 105*43486e4cSSteve Rae #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 106*43486e4cSSteve Rae 107*43486e4cSSteve Rae /* 108*43486e4cSSteve Rae * One partition type must be defined for part.c 109*43486e4cSSteve Rae * This is necessary for the fatls command to work on an SD card 110*43486e4cSSteve Rae * for example. 111*43486e4cSSteve Rae */ 112*43486e4cSSteve Rae #define CONFIG_DOS_PARTITION 113*43486e4cSSteve Rae #define CONFIG_EFI_PARTITION 114*43486e4cSSteve Rae 115*43486e4cSSteve Rae /* version string, parser, etc */ 116*43486e4cSSteve Rae #define CONFIG_VERSION_VARIABLE 117*43486e4cSSteve Rae #define CONFIG_AUTO_COMPLETE 118*43486e4cSSteve Rae #define CONFIG_CMDLINE_EDITING 119*43486e4cSSteve Rae #define CONFIG_SYS_LONGHELP 120*43486e4cSSteve Rae 121*43486e4cSSteve Rae #define CONFIG_CRC32_VERIFY 122*43486e4cSSteve Rae #define CONFIG_MX_CYCLIC 123*43486e4cSSteve Rae 124*43486e4cSSteve Rae /* Initial upstream - boot to cmd prompt only */ 125*43486e4cSSteve Rae #define CONFIG_BOOTCOMMAND "" 126*43486e4cSSteve Rae 127*43486e4cSSteve Rae /* Commands */ 128*43486e4cSSteve Rae #define CONFIG_FAT_WRITE 129*43486e4cSSteve Rae 130*43486e4cSSteve Rae /* Fastboot and USB OTG */ 131*43486e4cSSteve Rae #define CONFIG_USB_FUNCTION_FASTBOOT 132*43486e4cSSteve Rae #define CONFIG_CMD_FASTBOOT 133*43486e4cSSteve Rae #define CONFIG_FASTBOOT_FLASH 134*43486e4cSSteve Rae #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 135*43486e4cSSteve Rae #define CONFIG_SYS_CACHELINE_SIZE 64 136*43486e4cSSteve Rae #define CONFIG_FASTBOOT_BUF_SIZE 0x1d000000 137*43486e4cSSteve Rae #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE 138*43486e4cSSteve Rae #undef CONFIG_USB_GADGET_VBUS_DRAW 139*43486e4cSSteve Rae #define CONFIG_USB_GADGET_VBUS_DRAW 0 140*43486e4cSSteve Rae #define CONFIG_USB_GADGET_DWC2_PHY_8_BIT 141*43486e4cSSteve Rae #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY 142*43486e4cSSteve Rae #define CONFIG_USBID_ADDR 0x34052c46 143*43486e4cSSteve Rae 144*43486e4cSSteve Rae #define CONFIG_SYS_ICACHE_OFF 145*43486e4cSSteve Rae #define CONFIG_SYS_DCACHE_OFF 146*43486e4cSSteve Rae #define CONFIG_SYS_L2CACHE_OFF 147*43486e4cSSteve Rae 148*43486e4cSSteve Rae #endif /* __BCM23550_W1D_H */ 149