xref: /rk3399_rockchip-uboot/include/configs/at91sam9x5ek.h (revision dcd2f1a0d2875a1386535e2e0db9bfbd57a8fadb)
1f7fa2f37SBo Shen /*
2f7fa2f37SBo Shen  * Copyright (C) 2012 Atmel Corporation
3f7fa2f37SBo Shen  *
4f7fa2f37SBo Shen  * Configuation settings for the AT91SAM9X5EK board.
5f7fa2f37SBo Shen  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7f7fa2f37SBo Shen  */
8f7fa2f37SBo Shen 
9f7fa2f37SBo Shen #ifndef __CONFIG_H__
10f7fa2f37SBo Shen #define __CONFIG_H__
11f7fa2f37SBo Shen 
12f7fa2f37SBo Shen #include <asm/hardware.h>
13f7fa2f37SBo Shen 
1477461a65SBo Shen #define CONFIG_SYS_TEXT_BASE		0x26f00000
1577461a65SBo Shen 
16f7fa2f37SBo Shen /* ARM asynchronous clock */
17f7fa2f37SBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
18f7fa2f37SBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
19f7fa2f37SBo Shen #define CONFIG_SYS_HZ			1000
20f7fa2f37SBo Shen 
21f7fa2f37SBo Shen #define CONFIG_AT91SAM9X5EK
22f7fa2f37SBo Shen #define CONFIG_AT91FAMILY
23f7fa2f37SBo Shen 
24f7fa2f37SBo Shen #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
25f7fa2f37SBo Shen #define CONFIG_SETUP_MEMORY_TAGS
26f7fa2f37SBo Shen #define CONFIG_INITRD_TAG
27f7fa2f37SBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT
28f7fa2f37SBo Shen #define CONFIG_BOARD_EARLY_INIT_F
29f7fa2f37SBo Shen #define CONFIG_DISPLAY_CPUINFO
30f7fa2f37SBo Shen 
31f9129fe3SNicolas Ferre #define CONFIG_CMD_BOOTZ
32dc3e30baSBo Shen #define CONFIG_OF_LIBFDT
33dc3e30baSBo Shen 
34f7fa2f37SBo Shen /* general purpose I/O */
35f7fa2f37SBo Shen #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
36f7fa2f37SBo Shen #define CONFIG_AT91_GPIO
37f7fa2f37SBo Shen 
38f7fa2f37SBo Shen /* serial console */
39f7fa2f37SBo Shen #define CONFIG_ATMEL_USART
40f7fa2f37SBo Shen #define CONFIG_USART_BASE	ATMEL_BASE_DBGU
41f7fa2f37SBo Shen #define CONFIG_USART_ID		ATMEL_ID_SYS
42f7fa2f37SBo Shen 
43f7fa2f37SBo Shen /* LCD */
44f7fa2f37SBo Shen #define CONFIG_LCD
45f7fa2f37SBo Shen #define LCD_BPP			LCD_COLOR16
46f7fa2f37SBo Shen #define LCD_OUTPUT_BPP		24
47f7fa2f37SBo Shen #define CONFIG_LCD_LOGO
48f7fa2f37SBo Shen #undef LCD_TEST_PATTERN
49f7fa2f37SBo Shen #define CONFIG_LCD_INFO
50f7fa2f37SBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO
51f7fa2f37SBo Shen #define CONFIG_SYS_WHITE_ON_BLACK
52f7fa2f37SBo Shen #define CONFIG_ATMEL_HLCD
53f7fa2f37SBo Shen #define CONFIG_ATMEL_LCD_RGB565
54f7fa2f37SBo Shen #define CONFIG_SYS_CONSOLE_IS_IN_ENV
55f7fa2f37SBo Shen 
56f7fa2f37SBo Shen #define CONFIG_BOOTDELAY	3
57f7fa2f37SBo Shen 
58f7fa2f37SBo Shen /*
59f7fa2f37SBo Shen  * BOOTP options
60f7fa2f37SBo Shen  */
61f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTFILESIZE
62f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTPATH
63f7fa2f37SBo Shen #define CONFIG_BOOTP_GATEWAY
64f7fa2f37SBo Shen #define CONFIG_BOOTP_HOSTNAME
65f7fa2f37SBo Shen 
66f7fa2f37SBo Shen /*
67f7fa2f37SBo Shen  * Command line configuration.
68f7fa2f37SBo Shen  */
69f7fa2f37SBo Shen #include <config_cmd_default.h>
70f7fa2f37SBo Shen #undef CONFIG_CMD_FPGA
71f7fa2f37SBo Shen #undef CONFIG_CMD_IMI
72f7fa2f37SBo Shen #undef CONFIG_CMD_IMLS
73f7fa2f37SBo Shen #undef CONFIG_CMD_LOADS
74f7fa2f37SBo Shen 
75f7fa2f37SBo Shen #define CONFIG_CMD_PING
76f7fa2f37SBo Shen #define CONFIG_CMD_DHCP
77f7fa2f37SBo Shen #define CONFIG_CMD_NAND
781d7442e6SBo Shen #define CONFIG_CMD_SF
793a49cd7eSWu, Josh #define CONFIG_CMD_MMC
80419fba0cSRichard Genoud #define CONFIG_CMD_FAT
81b030e731SRichard Genoud #define CONFIG_CMD_USB
82b030e731SRichard Genoud 
83b030e731SRichard Genoud /*
84b030e731SRichard Genoud  * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
85b030e731SRichard Genoud  * NB: in this case, USB 1.1 devices won't be recognized.
86b030e731SRichard Genoud  */
87b030e731SRichard Genoud 
88f7fa2f37SBo Shen 
89f7fa2f37SBo Shen /* SDRAM */
90f7fa2f37SBo Shen #define CONFIG_NR_DRAM_BANKS		1
91f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_BASE		0x20000000
92f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */
93f7fa2f37SBo Shen 
94f7fa2f37SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \
95f7fa2f37SBo Shen 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
96f7fa2f37SBo Shen 
97f7fa2f37SBo Shen /* DataFlash */
981d7442e6SBo Shen #ifdef CONFIG_CMD_SF
991d7442e6SBo Shen #define CONFIG_ATMEL_SPI
100f7fa2f37SBo Shen #define CONFIG_SPI_FLASH
101f7fa2f37SBo Shen #define CONFIG_SPI_FLASH_ATMEL
1021d7442e6SBo Shen #define CONFIG_SF_DEFAULT_SPEED		30000000
103f7fa2f37SBo Shen #endif
104f7fa2f37SBo Shen 
105f7fa2f37SBo Shen /* no NOR flash */
106f7fa2f37SBo Shen #define CONFIG_SYS_NO_FLASH
107f7fa2f37SBo Shen 
108f7fa2f37SBo Shen /* NAND flash */
109f7fa2f37SBo Shen #ifdef CONFIG_CMD_NAND
110f7fa2f37SBo Shen #define CONFIG_NAND_ATMEL
111f7fa2f37SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE	1
112f7fa2f37SBo Shen #define CONFIG_SYS_NAND_BASE		0x40000000
113f7fa2f37SBo Shen #define CONFIG_SYS_NAND_DBW_8		1
114f7fa2f37SBo Shen /* our ALE is AD21 */
115f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
116f7fa2f37SBo Shen /* our CLE is AD22 */
117f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
118f7fa2f37SBo Shen #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
119f7fa2f37SBo Shen #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
120f7fa2f37SBo Shen 
121df95321cSWu, Josh /* PMECC & PMERRLOC */
122df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HWECC		1
123df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HW_PMECC	1
124df95321cSWu, Josh #define CONFIG_PMECC_CAP		2
125df95321cSWu, Josh #define CONFIG_PMECC_SECTOR_SIZE	512
126df95321cSWu, Josh 
127ce76f0aaSBo Shen #define CONFIG_CMD_NAND_TRIMFFS
128ce76f0aaSBo Shen 
129f7fa2f37SBo Shen #define CONFIG_MTD_DEVICE
130f7fa2f37SBo Shen #define CONFIG_CMD_MTDPARTS
131f7fa2f37SBo Shen #define CONFIG_MTD_PARTITIONS
132f7fa2f37SBo Shen #define CONFIG_RBTREE
133f7fa2f37SBo Shen #define CONFIG_LZO
134f7fa2f37SBo Shen #define CONFIG_CMD_UBI
135f7fa2f37SBo Shen #define CONFIG_CMD_UBIFS
136f7fa2f37SBo Shen #endif
137f7fa2f37SBo Shen 
1383a49cd7eSWu, Josh /* MMC */
1393a49cd7eSWu, Josh #ifdef CONFIG_CMD_MMC
1403a49cd7eSWu, Josh #define CONFIG_MMC
1413a49cd7eSWu, Josh #define CONFIG_GENERIC_MMC
1423a49cd7eSWu, Josh #define CONFIG_GENERIC_ATMEL_MCI
143419fba0cSRichard Genoud #endif
144419fba0cSRichard Genoud 
145419fba0cSRichard Genoud /* FAT */
146419fba0cSRichard Genoud #ifdef CONFIG_CMD_FAT
1473a49cd7eSWu, Josh #define CONFIG_DOS_PARTITION
1483a49cd7eSWu, Josh #endif
1493a49cd7eSWu, Josh 
150f7fa2f37SBo Shen /* Ethernet */
151f7fa2f37SBo Shen #define CONFIG_MACB
152f7fa2f37SBo Shen #define CONFIG_RMII
153f7fa2f37SBo Shen #define CONFIG_NET_RETRY_COUNT		20
154f7fa2f37SBo Shen #define CONFIG_MACB_SEARCH_PHY
155f7fa2f37SBo Shen 
156b030e731SRichard Genoud /* USB */
157b030e731SRichard Genoud #ifdef CONFIG_CMD_USB
158b030e731SRichard Genoud #ifdef CONFIG_USB_EHCI
159b030e731SRichard Genoud #define CONFIG_USB_EHCI_ATMEL
160b030e731SRichard Genoud #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
161b030e731SRichard Genoud #else
162*dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL
163*dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
164b030e731SRichard Genoud #define CONFIG_USB_OHCI_NEW
165b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_CPU_INIT
166b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
167b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
168b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
169b030e731SRichard Genoud #endif
170b030e731SRichard Genoud #define CONFIG_USB_STORAGE
171b030e731SRichard Genoud #endif
172b030e731SRichard Genoud 
173f7fa2f37SBo Shen #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
174f7fa2f37SBo Shen 
175f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
176f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_END		0x26e00000
177f7fa2f37SBo Shen 
178f7fa2f37SBo Shen #ifdef CONFIG_SYS_USE_NANDFLASH
179f7fa2f37SBo Shen /* bootstrap + u-boot + env + linux in nandflash */
180f7fa2f37SBo Shen #define CONFIG_ENV_IS_IN_NAND
181f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET		0xc0000
182f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET_REDUND	0x100000
183f7fa2f37SBo Shen #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
184f7fa2f37SBo Shen #define CONFIG_BOOTCOMMAND	"nand read " \
185f7fa2f37SBo Shen 				"0x22000000 0x200000 0x300000; " \
186f7fa2f37SBo Shen 				"bootm 0x22000000"
187b7e3129eSWu, Josh #elif defined(CONFIG_SYS_USE_SPIFLASH)
1881d7442e6SBo Shen /* bootstrap + u-boot + env + linux in spi flash */
1891d7442e6SBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH
1901d7442e6SBo Shen #define CONFIG_ENV_OFFSET	0x5000
1911d7442e6SBo Shen #define CONFIG_ENV_SIZE		0x3000
1921d7442e6SBo Shen #define CONFIG_ENV_SECT_SIZE	0x1000
1931d7442e6SBo Shen #define CONFIG_ENV_SPI_MAX_HZ	30000000
1941d7442e6SBo Shen #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
1951d7442e6SBo Shen 				"sf read 0x22000000 0x100000 0x300000; " \
1961d7442e6SBo Shen 				"bootm 0x22000000"
197961ffc77SBo Shen #elif defined(CONFIG_SYS_USE_DATAFLASH)
198961ffc77SBo Shen /* bootstrap + u-boot + env + linux in data flash */
199961ffc77SBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH
200961ffc77SBo Shen #define CONFIG_ENV_OFFSET	0x4200
201961ffc77SBo Shen #define CONFIG_ENV_SIZE		0x4200
202961ffc77SBo Shen #define CONFIG_ENV_SECT_SIZE	0x210
203961ffc77SBo Shen #define CONFIG_ENV_SPI_MAX_HZ	30000000
204961ffc77SBo Shen #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
205961ffc77SBo Shen 				"sf read 0x22000000 0x84000 0x294000; " \
206961ffc77SBo Shen 				"bootm 0x22000000"
207b7e3129eSWu, Josh #else /* CONFIG_SYS_USE_MMC */
208b7e3129eSWu, Josh /* bootstrap + u-boot + env + linux in mmc */
209b7e3129eSWu, Josh #define CONFIG_ENV_IS_IN_MMC
210b7e3129eSWu, Josh /* For FAT system, most cases it should be in the reserved sector */
211b7e3129eSWu, Josh #define CONFIG_ENV_OFFSET	0x2000
212b7e3129eSWu, Josh #define CONFIG_ENV_SIZE		0x1000
213b7e3129eSWu, Josh #define CONFIG_SYS_MMC_ENV_DEV	0
214f7fa2f37SBo Shen #endif
215f7fa2f37SBo Shen 
216b7e3129eSWu, Josh #ifdef CONFIG_SYS_USE_MMC
217b7e3129eSWu, Josh #define CONFIG_BOOTARGS		"mem=128M console=ttyS0,115200 " \
218b7e3129eSWu, Josh 				"mtdparts=atmel_nand:" \
219b7e3129eSWu, Josh 				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
220b7e3129eSWu, Josh 				"root=/dev/mmcblk0p2 " \
221b7e3129eSWu, Josh 				"rw rootfstype=ext4 rootwait"
222b7e3129eSWu, Josh #else
2230c58cfa9SBo Shen #define CONFIG_BOOTARGS							\
2240c58cfa9SBo Shen 	"console=ttyS0,115200 earlyprintk "				\
2250c58cfa9SBo Shen 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
2260c58cfa9SBo Shen 	"256k(env),256k(env_redundant),256k(spare),"			\
2270c58cfa9SBo Shen 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
2280c58cfa9SBo Shen 	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
229b7e3129eSWu, Josh #endif
230f7fa2f37SBo Shen 
231f7fa2f37SBo Shen #define CONFIG_BAUDRATE		115200
232f7fa2f37SBo Shen 
233f7fa2f37SBo Shen #define CONFIG_SYS_PROMPT	"U-Boot> "
234f7fa2f37SBo Shen #define CONFIG_SYS_CBSIZE	256
235f7fa2f37SBo Shen #define CONFIG_SYS_MAXARGS	16
236f7fa2f37SBo Shen #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
237f7fa2f37SBo Shen 					+ 16)
238f7fa2f37SBo Shen #define CONFIG_SYS_LONGHELP
239f7fa2f37SBo Shen #define CONFIG_CMDLINE_EDITING
240f7fa2f37SBo Shen #define CONFIG_AUTO_COMPLETE
241f7fa2f37SBo Shen #define CONFIG_SYS_HUSH_PARSER
242f7fa2f37SBo Shen 
243f7fa2f37SBo Shen /*
244f7fa2f37SBo Shen  * Size of malloc() pool
245f7fa2f37SBo Shen  */
246f7fa2f37SBo Shen #define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)
247f7fa2f37SBo Shen 
248f7fa2f37SBo Shen #ifdef CONFIG_USE_IRQ
249f7fa2f37SBo Shen #error CONFIG_USE_IRQ not supported
250f7fa2f37SBo Shen #endif
251f7fa2f37SBo Shen 
252f7fa2f37SBo Shen #endif
253