xref: /rk3399_rockchip-uboot/include/configs/at91sam9x5ek.h (revision d51a2a2d63d83207b56a7aef7a191d081058d6ae)
1f7fa2f37SBo Shen /*
2f7fa2f37SBo Shen  * Copyright (C) 2012 Atmel Corporation
3f7fa2f37SBo Shen  *
4f7fa2f37SBo Shen  * Configuation settings for the AT91SAM9X5EK board.
5f7fa2f37SBo Shen  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7f7fa2f37SBo Shen  */
8f7fa2f37SBo Shen 
9f7fa2f37SBo Shen #ifndef __CONFIG_H__
10f7fa2f37SBo Shen #define __CONFIG_H__
11f7fa2f37SBo Shen 
12f7fa2f37SBo Shen #include <asm/hardware.h>
13f7fa2f37SBo Shen 
1477461a65SBo Shen #define CONFIG_SYS_TEXT_BASE		0x26f00000
1577461a65SBo Shen 
16f7fa2f37SBo Shen /* ARM asynchronous clock */
17f7fa2f37SBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
18f7fa2f37SBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
19f7fa2f37SBo Shen 
20f7fa2f37SBo Shen #define CONFIG_AT91SAM9X5EK
21f7fa2f37SBo Shen #define CONFIG_AT91FAMILY
22f7fa2f37SBo Shen 
23f7fa2f37SBo Shen #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
24f7fa2f37SBo Shen #define CONFIG_SETUP_MEMORY_TAGS
25f7fa2f37SBo Shen #define CONFIG_INITRD_TAG
26f7fa2f37SBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT
27f7fa2f37SBo Shen #define CONFIG_BOARD_EARLY_INIT_F
28f7fa2f37SBo Shen #define CONFIG_DISPLAY_CPUINFO
29f7fa2f37SBo Shen 
30f9129fe3SNicolas Ferre #define CONFIG_CMD_BOOTZ
31dc3e30baSBo Shen #define CONFIG_OF_LIBFDT
32dc3e30baSBo Shen 
33f7fa2f37SBo Shen /* general purpose I/O */
34f7fa2f37SBo Shen #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
35f7fa2f37SBo Shen #define CONFIG_AT91_GPIO
36f7fa2f37SBo Shen 
37f7fa2f37SBo Shen /* serial console */
38f7fa2f37SBo Shen #define CONFIG_ATMEL_USART
39f7fa2f37SBo Shen #define CONFIG_USART_BASE	ATMEL_BASE_DBGU
40f7fa2f37SBo Shen #define CONFIG_USART_ID		ATMEL_ID_SYS
41f7fa2f37SBo Shen 
42f7fa2f37SBo Shen /* LCD */
43f7fa2f37SBo Shen #define CONFIG_LCD
44f7fa2f37SBo Shen #define LCD_BPP			LCD_COLOR16
45f7fa2f37SBo Shen #define LCD_OUTPUT_BPP		24
46f7fa2f37SBo Shen #define CONFIG_LCD_LOGO
47f7fa2f37SBo Shen #define CONFIG_LCD_INFO
48f7fa2f37SBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO
49f7fa2f37SBo Shen #define CONFIG_SYS_WHITE_ON_BLACK
50f7fa2f37SBo Shen #define CONFIG_ATMEL_HLCD
51f7fa2f37SBo Shen #define CONFIG_ATMEL_LCD_RGB565
52f7fa2f37SBo Shen #define CONFIG_SYS_CONSOLE_IS_IN_ENV
53f7fa2f37SBo Shen 
54f7fa2f37SBo Shen #define CONFIG_BOOTDELAY	3
55f7fa2f37SBo Shen 
56f7fa2f37SBo Shen /*
57f7fa2f37SBo Shen  * BOOTP options
58f7fa2f37SBo Shen  */
59f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTFILESIZE
60f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTPATH
61f7fa2f37SBo Shen #define CONFIG_BOOTP_GATEWAY
62f7fa2f37SBo Shen #define CONFIG_BOOTP_HOSTNAME
63f7fa2f37SBo Shen 
64*d51a2a2dSBo Shen /* no NOR flash */
65*d51a2a2dSBo Shen #define CONFIG_SYS_NO_FLASH
66*d51a2a2dSBo Shen 
67f7fa2f37SBo Shen /*
68f7fa2f37SBo Shen  * Command line configuration.
69f7fa2f37SBo Shen  */
70f7fa2f37SBo Shen #include <config_cmd_default.h>
71f7fa2f37SBo Shen #undef CONFIG_CMD_FPGA
72f7fa2f37SBo Shen #undef CONFIG_CMD_IMI
73f7fa2f37SBo Shen 
74f7fa2f37SBo Shen #define CONFIG_CMD_PING
75f7fa2f37SBo Shen #define CONFIG_CMD_DHCP
76f7fa2f37SBo Shen #define CONFIG_CMD_NAND
771d7442e6SBo Shen #define CONFIG_CMD_SF
783a49cd7eSWu, Josh #define CONFIG_CMD_MMC
79419fba0cSRichard Genoud #define CONFIG_CMD_FAT
80b030e731SRichard Genoud #define CONFIG_CMD_USB
81b030e731SRichard Genoud 
82b030e731SRichard Genoud /*
83b030e731SRichard Genoud  * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
84b030e731SRichard Genoud  * NB: in this case, USB 1.1 devices won't be recognized.
85b030e731SRichard Genoud  */
86b030e731SRichard Genoud 
87f7fa2f37SBo Shen 
88f7fa2f37SBo Shen /* SDRAM */
89f7fa2f37SBo Shen #define CONFIG_NR_DRAM_BANKS		1
90f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_BASE		0x20000000
91f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */
92f7fa2f37SBo Shen 
93f7fa2f37SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \
94f7fa2f37SBo Shen 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
95f7fa2f37SBo Shen 
96f7fa2f37SBo Shen /* DataFlash */
971d7442e6SBo Shen #ifdef CONFIG_CMD_SF
981d7442e6SBo Shen #define CONFIG_ATMEL_SPI
99f7fa2f37SBo Shen #define CONFIG_SPI_FLASH
100f7fa2f37SBo Shen #define CONFIG_SPI_FLASH_ATMEL
1011d7442e6SBo Shen #define CONFIG_SF_DEFAULT_SPEED		30000000
102f7fa2f37SBo Shen #endif
103f7fa2f37SBo Shen 
104f7fa2f37SBo Shen /* NAND flash */
105f7fa2f37SBo Shen #ifdef CONFIG_CMD_NAND
106f7fa2f37SBo Shen #define CONFIG_NAND_ATMEL
107f7fa2f37SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE	1
108f7fa2f37SBo Shen #define CONFIG_SYS_NAND_BASE		0x40000000
109f7fa2f37SBo Shen #define CONFIG_SYS_NAND_DBW_8		1
110f7fa2f37SBo Shen /* our ALE is AD21 */
111f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
112f7fa2f37SBo Shen /* our CLE is AD22 */
113f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
114f7fa2f37SBo Shen #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
115f7fa2f37SBo Shen #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
116f7fa2f37SBo Shen 
117df95321cSWu, Josh /* PMECC & PMERRLOC */
118df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HWECC		1
119df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HW_PMECC	1
120df95321cSWu, Josh #define CONFIG_PMECC_CAP		2
121df95321cSWu, Josh #define CONFIG_PMECC_SECTOR_SIZE	512
122df95321cSWu, Josh 
123ce76f0aaSBo Shen #define CONFIG_CMD_NAND_TRIMFFS
124ce76f0aaSBo Shen 
125f7fa2f37SBo Shen #define CONFIG_MTD_DEVICE
126f7fa2f37SBo Shen #define CONFIG_CMD_MTDPARTS
127f7fa2f37SBo Shen #define CONFIG_MTD_PARTITIONS
128f7fa2f37SBo Shen #define CONFIG_RBTREE
129f7fa2f37SBo Shen #define CONFIG_LZO
130f7fa2f37SBo Shen #define CONFIG_CMD_UBI
131f7fa2f37SBo Shen #define CONFIG_CMD_UBIFS
132f7fa2f37SBo Shen #endif
133f7fa2f37SBo Shen 
1343a49cd7eSWu, Josh /* MMC */
1353a49cd7eSWu, Josh #ifdef CONFIG_CMD_MMC
1363a49cd7eSWu, Josh #define CONFIG_MMC
1373a49cd7eSWu, Josh #define CONFIG_GENERIC_MMC
1383a49cd7eSWu, Josh #define CONFIG_GENERIC_ATMEL_MCI
139419fba0cSRichard Genoud #endif
140419fba0cSRichard Genoud 
141419fba0cSRichard Genoud /* FAT */
142419fba0cSRichard Genoud #ifdef CONFIG_CMD_FAT
1433a49cd7eSWu, Josh #define CONFIG_DOS_PARTITION
1443a49cd7eSWu, Josh #endif
1453a49cd7eSWu, Josh 
146f7fa2f37SBo Shen /* Ethernet */
147f7fa2f37SBo Shen #define CONFIG_MACB
148f7fa2f37SBo Shen #define CONFIG_RMII
149f7fa2f37SBo Shen #define CONFIG_NET_RETRY_COUNT		20
150f7fa2f37SBo Shen #define CONFIG_MACB_SEARCH_PHY
151f7fa2f37SBo Shen 
152b030e731SRichard Genoud /* USB */
153b030e731SRichard Genoud #ifdef CONFIG_CMD_USB
154b030e731SRichard Genoud #ifdef CONFIG_USB_EHCI
155b030e731SRichard Genoud #define CONFIG_USB_EHCI_ATMEL
156b030e731SRichard Genoud #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
157b030e731SRichard Genoud #else
158dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL
159dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
160b030e731SRichard Genoud #define CONFIG_USB_OHCI_NEW
161b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_CPU_INIT
162b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
163b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
164b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
165b030e731SRichard Genoud #endif
166b030e731SRichard Genoud #define CONFIG_USB_STORAGE
167b030e731SRichard Genoud #endif
168b030e731SRichard Genoud 
169f7fa2f37SBo Shen #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
170f7fa2f37SBo Shen 
171f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
172f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_END		0x26e00000
173f7fa2f37SBo Shen 
174f7fa2f37SBo Shen #ifdef CONFIG_SYS_USE_NANDFLASH
175f7fa2f37SBo Shen /* bootstrap + u-boot + env + linux in nandflash */
176f7fa2f37SBo Shen #define CONFIG_ENV_IS_IN_NAND
177f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET		0xc0000
178f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET_REDUND	0x100000
179f7fa2f37SBo Shen #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
180f7fa2f37SBo Shen #define CONFIG_BOOTCOMMAND	"nand read " \
181f7fa2f37SBo Shen 				"0x22000000 0x200000 0x300000; " \
182f7fa2f37SBo Shen 				"bootm 0x22000000"
183b7e3129eSWu, Josh #elif defined(CONFIG_SYS_USE_SPIFLASH)
1841d7442e6SBo Shen /* bootstrap + u-boot + env + linux in spi flash */
1851d7442e6SBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH
1861d7442e6SBo Shen #define CONFIG_ENV_OFFSET	0x5000
1871d7442e6SBo Shen #define CONFIG_ENV_SIZE		0x3000
1881d7442e6SBo Shen #define CONFIG_ENV_SECT_SIZE	0x1000
1891d7442e6SBo Shen #define CONFIG_ENV_SPI_MAX_HZ	30000000
1901d7442e6SBo Shen #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
1911d7442e6SBo Shen 				"sf read 0x22000000 0x100000 0x300000; " \
1921d7442e6SBo Shen 				"bootm 0x22000000"
193961ffc77SBo Shen #elif defined(CONFIG_SYS_USE_DATAFLASH)
194961ffc77SBo Shen /* bootstrap + u-boot + env + linux in data flash */
195961ffc77SBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH
196961ffc77SBo Shen #define CONFIG_ENV_OFFSET	0x4200
197961ffc77SBo Shen #define CONFIG_ENV_SIZE		0x4200
198961ffc77SBo Shen #define CONFIG_ENV_SECT_SIZE	0x210
199961ffc77SBo Shen #define CONFIG_ENV_SPI_MAX_HZ	30000000
200961ffc77SBo Shen #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
201961ffc77SBo Shen 				"sf read 0x22000000 0x84000 0x294000; " \
202961ffc77SBo Shen 				"bootm 0x22000000"
203b7e3129eSWu, Josh #else /* CONFIG_SYS_USE_MMC */
204b7e3129eSWu, Josh /* bootstrap + u-boot + env + linux in mmc */
205b7e3129eSWu, Josh #define CONFIG_ENV_IS_IN_MMC
206b7e3129eSWu, Josh /* For FAT system, most cases it should be in the reserved sector */
207b7e3129eSWu, Josh #define CONFIG_ENV_OFFSET	0x2000
208b7e3129eSWu, Josh #define CONFIG_ENV_SIZE		0x1000
209b7e3129eSWu, Josh #define CONFIG_SYS_MMC_ENV_DEV	0
210f7fa2f37SBo Shen #endif
211f7fa2f37SBo Shen 
212b7e3129eSWu, Josh #ifdef CONFIG_SYS_USE_MMC
213b7e3129eSWu, Josh #define CONFIG_BOOTARGS		"mem=128M console=ttyS0,115200 " \
214b7e3129eSWu, Josh 				"mtdparts=atmel_nand:" \
215b7e3129eSWu, Josh 				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
216b7e3129eSWu, Josh 				"root=/dev/mmcblk0p2 " \
217b7e3129eSWu, Josh 				"rw rootfstype=ext4 rootwait"
218b7e3129eSWu, Josh #else
2190c58cfa9SBo Shen #define CONFIG_BOOTARGS							\
2200c58cfa9SBo Shen 	"console=ttyS0,115200 earlyprintk "				\
2210c58cfa9SBo Shen 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
2220c58cfa9SBo Shen 	"256k(env),256k(env_redundant),256k(spare),"			\
2230c58cfa9SBo Shen 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
2240c58cfa9SBo Shen 	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
225b7e3129eSWu, Josh #endif
226f7fa2f37SBo Shen 
227f7fa2f37SBo Shen #define CONFIG_BAUDRATE		115200
228f7fa2f37SBo Shen 
229f7fa2f37SBo Shen #define CONFIG_SYS_PROMPT	"U-Boot> "
230f7fa2f37SBo Shen #define CONFIG_SYS_CBSIZE	256
231f7fa2f37SBo Shen #define CONFIG_SYS_MAXARGS	16
232f7fa2f37SBo Shen #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
233f7fa2f37SBo Shen 					+ 16)
234f7fa2f37SBo Shen #define CONFIG_SYS_LONGHELP
235f7fa2f37SBo Shen #define CONFIG_CMDLINE_EDITING
236f7fa2f37SBo Shen #define CONFIG_AUTO_COMPLETE
237f7fa2f37SBo Shen #define CONFIG_SYS_HUSH_PARSER
238f7fa2f37SBo Shen 
239f7fa2f37SBo Shen /*
240f7fa2f37SBo Shen  * Size of malloc() pool
241f7fa2f37SBo Shen  */
242f7fa2f37SBo Shen #define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)
243f7fa2f37SBo Shen 
244f7fa2f37SBo Shen #endif
245