1f7fa2f37SBo Shen /* 2f7fa2f37SBo Shen * Copyright (C) 2012 Atmel Corporation 3f7fa2f37SBo Shen * 4f7fa2f37SBo Shen * Configuation settings for the AT91SAM9X5EK board. 5f7fa2f37SBo Shen * 61a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7f7fa2f37SBo Shen */ 8f7fa2f37SBo Shen 9f7fa2f37SBo Shen #ifndef __CONFIG_H__ 10f7fa2f37SBo Shen #define __CONFIG_H__ 11f7fa2f37SBo Shen 12f7fa2f37SBo Shen #include <asm/hardware.h> 13f7fa2f37SBo Shen 1477461a65SBo Shen #define CONFIG_SYS_TEXT_BASE 0x26f00000 1577461a65SBo Shen 16f7fa2f37SBo Shen /* ARM asynchronous clock */ 17f7fa2f37SBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 18f7fa2f37SBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 19f7fa2f37SBo Shen 20f7fa2f37SBo Shen #define CONFIG_AT91SAM9X5EK 21f7fa2f37SBo Shen 22f7fa2f37SBo Shen #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 23f7fa2f37SBo Shen #define CONFIG_SETUP_MEMORY_TAGS 24f7fa2f37SBo Shen #define CONFIG_INITRD_TAG 25f7fa2f37SBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT 26f7fa2f37SBo Shen 27f7fa2f37SBo Shen /* general purpose I/O */ 28f7fa2f37SBo Shen #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 29f7fa2f37SBo Shen 30f7fa2f37SBo Shen /* LCD */ 31f7fa2f37SBo Shen #define LCD_BPP LCD_COLOR16 32f7fa2f37SBo Shen #define LCD_OUTPUT_BPP 24 33f7fa2f37SBo Shen #define CONFIG_LCD_LOGO 34f7fa2f37SBo Shen #define CONFIG_LCD_INFO 35f7fa2f37SBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO 36f7fa2f37SBo Shen #define CONFIG_ATMEL_HLCD 37f7fa2f37SBo Shen #define CONFIG_ATMEL_LCD_RGB565 38f7fa2f37SBo Shen 39f7fa2f37SBo Shen 40f7fa2f37SBo Shen /* 41f7fa2f37SBo Shen * BOOTP options 42f7fa2f37SBo Shen */ 43f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTFILESIZE 44f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTPATH 45f7fa2f37SBo Shen #define CONFIG_BOOTP_GATEWAY 46f7fa2f37SBo Shen #define CONFIG_BOOTP_HOSTNAME 47f7fa2f37SBo Shen 48f7fa2f37SBo Shen /* 498850c5d5STom Rini * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) 50b030e731SRichard Genoud * NB: in this case, USB 1.1 devices won't be recognized. 51b030e731SRichard Genoud */ 52b030e731SRichard Genoud 53f7fa2f37SBo Shen /* SDRAM */ 54f7fa2f37SBo Shen #define CONFIG_NR_DRAM_BANKS 1 55f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_BASE 0x20000000 56f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 57f7fa2f37SBo Shen 58f7fa2f37SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \ 5974631b69SWenyou Yang (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 60f7fa2f37SBo Shen 61f7fa2f37SBo Shen /* DataFlash */ 621d7442e6SBo Shen #ifdef CONFIG_CMD_SF 631d7442e6SBo Shen #define CONFIG_SF_DEFAULT_SPEED 30000000 64f7fa2f37SBo Shen #endif 65f7fa2f37SBo Shen 66f7fa2f37SBo Shen /* NAND flash */ 67f7fa2f37SBo Shen #ifdef CONFIG_CMD_NAND 68f7fa2f37SBo Shen #define CONFIG_NAND_ATMEL 69f7fa2f37SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE 1 70f7fa2f37SBo Shen #define CONFIG_SYS_NAND_BASE 0x40000000 71f7fa2f37SBo Shen #define CONFIG_SYS_NAND_DBW_8 1 72f7fa2f37SBo Shen /* our ALE is AD21 */ 73f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 74f7fa2f37SBo Shen /* our CLE is AD22 */ 75f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 76f7fa2f37SBo Shen #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 77f7fa2f37SBo Shen #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 78f7fa2f37SBo Shen 79*8f1a80e9STom Rini #define CONFIG_MTD_DEVICE 80*8f1a80e9STom Rini #define CONFIG_MTD_PARTITIONS 81*8f1a80e9STom Rini #endif 82*8f1a80e9STom Rini 83df95321cSWu, Josh /* PMECC & PMERRLOC */ 84df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HWECC 1 85df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HW_PMECC 1 86df95321cSWu, Josh #define CONFIG_PMECC_CAP 2 87df95321cSWu, Josh #define CONFIG_PMECC_SECTOR_SIZE 512 88df95321cSWu, Josh 89b030e731SRichard Genoud /* USB */ 90b030e731SRichard Genoud #ifdef CONFIG_CMD_USB 918850c5d5STom Rini #ifndef CONFIG_USB_EHCI_HCD 92dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL 93dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_UPLL 94b030e731SRichard Genoud #define CONFIG_USB_OHCI_NEW 95b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_CPU_INIT 96b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 97b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" 98b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 99b030e731SRichard Genoud #endif 100b030e731SRichard Genoud #endif 101b030e731SRichard Genoud 102f7fa2f37SBo Shen #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 103f7fa2f37SBo Shen 104f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 105f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_END 0x26e00000 106f7fa2f37SBo Shen 107f7fa2f37SBo Shen #ifdef CONFIG_SYS_USE_NANDFLASH 108f7fa2f37SBo Shen /* bootstrap + u-boot + env + linux in nandflash */ 10974631b69SWenyou Yang #define CONFIG_ENV_OFFSET 0x120000 110f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET_REDUND 0x100000 111f7fa2f37SBo Shen #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 112f7fa2f37SBo Shen #define CONFIG_BOOTCOMMAND "nand read " \ 113f7fa2f37SBo Shen "0x22000000 0x200000 0x300000; " \ 114f7fa2f37SBo Shen "bootm 0x22000000" 115b7e3129eSWu, Josh #elif defined(CONFIG_SYS_USE_SPIFLASH) 1161d7442e6SBo Shen /* bootstrap + u-boot + env + linux in spi flash */ 1171d7442e6SBo Shen #define CONFIG_ENV_OFFSET 0x5000 1181d7442e6SBo Shen #define CONFIG_ENV_SIZE 0x3000 1191d7442e6SBo Shen #define CONFIG_ENV_SECT_SIZE 0x1000 1201d7442e6SBo Shen #define CONFIG_ENV_SPI_MAX_HZ 30000000 1211d7442e6SBo Shen #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 1221d7442e6SBo Shen "sf read 0x22000000 0x100000 0x300000; " \ 1231d7442e6SBo Shen "bootm 0x22000000" 124961ffc77SBo Shen #elif defined(CONFIG_SYS_USE_DATAFLASH) 125961ffc77SBo Shen /* bootstrap + u-boot + env + linux in data flash */ 126961ffc77SBo Shen #define CONFIG_ENV_OFFSET 0x4200 127961ffc77SBo Shen #define CONFIG_ENV_SIZE 0x4200 128961ffc77SBo Shen #define CONFIG_ENV_SECT_SIZE 0x210 129961ffc77SBo Shen #define CONFIG_ENV_SPI_MAX_HZ 30000000 130961ffc77SBo Shen #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 131961ffc77SBo Shen "sf read 0x22000000 0x84000 0x294000; " \ 132961ffc77SBo Shen "bootm 0x22000000" 133b7e3129eSWu, Josh #else /* CONFIG_SYS_USE_MMC */ 134b7e3129eSWu, Josh /* bootstrap + u-boot + env + linux in mmc */ 13526961772SWu, Josh #define CONFIG_ENV_SIZE 0x4000 136f7fa2f37SBo Shen #endif 137f7fa2f37SBo Shen 138b7e3129eSWu, Josh #ifdef CONFIG_SYS_USE_MMC 139b7e3129eSWu, Josh #define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ 140b7e3129eSWu, Josh "mtdparts=atmel_nand:" \ 141b7e3129eSWu, Josh "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ 142b7e3129eSWu, Josh "root=/dev/mmcblk0p2 " \ 143b7e3129eSWu, Josh "rw rootfstype=ext4 rootwait" 144b7e3129eSWu, Josh #else 1450c58cfa9SBo Shen #define CONFIG_BOOTARGS \ 1460c58cfa9SBo Shen "console=ttyS0,115200 earlyprintk " \ 1470c58cfa9SBo Shen "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 1480c58cfa9SBo Shen "256k(env),256k(env_redundant),256k(spare)," \ 1490c58cfa9SBo Shen "512k(dtb),6M(kernel)ro,-(rootfs) " \ 1500c58cfa9SBo Shen "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw" 151b7e3129eSWu, Josh #endif 152f7fa2f37SBo Shen 153f7fa2f37SBo Shen #define CONFIG_SYS_CBSIZE 256 154f7fa2f37SBo Shen #define CONFIG_SYS_MAXARGS 16 155f7fa2f37SBo Shen #define CONFIG_SYS_LONGHELP 156f7fa2f37SBo Shen #define CONFIG_CMDLINE_EDITING 157f7fa2f37SBo Shen #define CONFIG_AUTO_COMPLETE 158f7fa2f37SBo Shen 159f7fa2f37SBo Shen /* 160f7fa2f37SBo Shen * Size of malloc() pool 161f7fa2f37SBo Shen */ 162f7fa2f37SBo Shen #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 163f7fa2f37SBo Shen 164d85e8914SBo Shen /* SPL */ 165d85e8914SBo Shen #define CONFIG_SPL_FRAMEWORK 166d85e8914SBo Shen #define CONFIG_SPL_TEXT_BASE 0x300000 167d85e8914SBo Shen #define CONFIG_SPL_MAX_SIZE 0x6000 168d85e8914SBo Shen #define CONFIG_SPL_STACK 0x308000 169d85e8914SBo Shen 170d85e8914SBo Shen #define CONFIG_SPL_BSS_START_ADDR 0x20000000 171d85e8914SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 172d85e8914SBo Shen #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 173d85e8914SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 174d85e8914SBo Shen 175d85e8914SBo Shen #define CONFIG_SYS_MONITOR_LEN (512 << 10) 176d85e8914SBo Shen 177d85e8914SBo Shen #define CONFIG_SYS_MASTER_CLOCK 132096000 178d85e8914SBo Shen #define CONFIG_SYS_AT91_PLLA 0x20c73f03 179d85e8914SBo Shen #define CONFIG_SYS_MCKR 0x1301 180d85e8914SBo Shen #define CONFIG_SYS_MCKR_CSS 0x1302 181d85e8914SBo Shen 182d85e8914SBo Shen #ifdef CONFIG_SYS_USE_MMC 183d85e8914SBo Shen #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds 184d85e8914SBo Shen #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 185d85e8914SBo Shen #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 186d85e8914SBo Shen 187d85e8914SBo Shen #elif CONFIG_SYS_USE_NANDFLASH 188d85e8914SBo Shen #define CONFIG_SPL_NAND_DRIVERS 189d85e8914SBo Shen #define CONFIG_SPL_NAND_BASE 190d85e8914SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 191d85e8914SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE 192d85e8914SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 193d85e8914SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT 64 194d85e8914SBo Shen #define CONFIG_SYS_NAND_OOBSIZE 64 195d85e8914SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 196d85e8914SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 197d85e8914SBo Shen #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 198d85e8914SBo Shen 199d85e8914SBo Shen #elif CONFIG_SYS_USE_SPIFLASH 200d85e8914SBo Shen #define CONFIG_SPL_SPI_LOAD 201d85e8914SBo Shen #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 202d85e8914SBo Shen 203d85e8914SBo Shen #endif 204d85e8914SBo Shen 205f7fa2f37SBo Shen #endif 206