xref: /rk3399_rockchip-uboot/include/configs/at91sam9x5ek.h (revision 26961772ff2abd89dddf6232a458f8ff7d49c4f8)
1f7fa2f37SBo Shen /*
2f7fa2f37SBo Shen  * Copyright (C) 2012 Atmel Corporation
3f7fa2f37SBo Shen  *
4f7fa2f37SBo Shen  * Configuation settings for the AT91SAM9X5EK board.
5f7fa2f37SBo Shen  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
7f7fa2f37SBo Shen  */
8f7fa2f37SBo Shen 
9f7fa2f37SBo Shen #ifndef __CONFIG_H__
10f7fa2f37SBo Shen #define __CONFIG_H__
11f7fa2f37SBo Shen 
12f7fa2f37SBo Shen #include <asm/hardware.h>
13f7fa2f37SBo Shen 
1477461a65SBo Shen #define CONFIG_SYS_TEXT_BASE		0x26f00000
1577461a65SBo Shen 
16f7fa2f37SBo Shen /* ARM asynchronous clock */
17f7fa2f37SBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
18f7fa2f37SBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
19f7fa2f37SBo Shen 
20f7fa2f37SBo Shen #define CONFIG_AT91SAM9X5EK
21f7fa2f37SBo Shen 
22f7fa2f37SBo Shen #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
23f7fa2f37SBo Shen #define CONFIG_SETUP_MEMORY_TAGS
24f7fa2f37SBo Shen #define CONFIG_INITRD_TAG
25f7fa2f37SBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT
26f7fa2f37SBo Shen #define CONFIG_BOARD_EARLY_INIT_F
27f7fa2f37SBo Shen #define CONFIG_DISPLAY_CPUINFO
28f7fa2f37SBo Shen 
29f9129fe3SNicolas Ferre #define CONFIG_CMD_BOOTZ
30dc3e30baSBo Shen #define CONFIG_OF_LIBFDT
31dc3e30baSBo Shen 
3249527592SBo Shen #define CONFIG_SYS_GENERIC_BOARD
3349527592SBo Shen 
34f7fa2f37SBo Shen /* general purpose I/O */
35f7fa2f37SBo Shen #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
36f7fa2f37SBo Shen #define CONFIG_AT91_GPIO
37f7fa2f37SBo Shen 
38f7fa2f37SBo Shen /* serial console */
39f7fa2f37SBo Shen #define CONFIG_ATMEL_USART
40f7fa2f37SBo Shen #define CONFIG_USART_BASE	ATMEL_BASE_DBGU
41f7fa2f37SBo Shen #define CONFIG_USART_ID		ATMEL_ID_SYS
42f7fa2f37SBo Shen 
43f7fa2f37SBo Shen /* LCD */
44f7fa2f37SBo Shen #define CONFIG_LCD
45f7fa2f37SBo Shen #define LCD_BPP			LCD_COLOR16
46f7fa2f37SBo Shen #define LCD_OUTPUT_BPP		24
47f7fa2f37SBo Shen #define CONFIG_LCD_LOGO
48f7fa2f37SBo Shen #define CONFIG_LCD_INFO
49f7fa2f37SBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO
50f7fa2f37SBo Shen #define CONFIG_SYS_WHITE_ON_BLACK
51f7fa2f37SBo Shen #define CONFIG_ATMEL_HLCD
52f7fa2f37SBo Shen #define CONFIG_ATMEL_LCD_RGB565
53f7fa2f37SBo Shen #define CONFIG_SYS_CONSOLE_IS_IN_ENV
54f7fa2f37SBo Shen 
55f7fa2f37SBo Shen #define CONFIG_BOOTDELAY	3
56f7fa2f37SBo Shen 
57f7fa2f37SBo Shen /*
58f7fa2f37SBo Shen  * BOOTP options
59f7fa2f37SBo Shen  */
60f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTFILESIZE
61f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTPATH
62f7fa2f37SBo Shen #define CONFIG_BOOTP_GATEWAY
63f7fa2f37SBo Shen #define CONFIG_BOOTP_HOSTNAME
64f7fa2f37SBo Shen 
65d51a2a2dSBo Shen /* no NOR flash */
66d51a2a2dSBo Shen #define CONFIG_SYS_NO_FLASH
67d51a2a2dSBo Shen 
68f7fa2f37SBo Shen /*
69f7fa2f37SBo Shen  * Command line configuration.
70f7fa2f37SBo Shen  */
71f7fa2f37SBo Shen #include <config_cmd_default.h>
72f7fa2f37SBo Shen #undef CONFIG_CMD_FPGA
73f7fa2f37SBo Shen #undef CONFIG_CMD_IMI
74f7fa2f37SBo Shen 
75f7fa2f37SBo Shen #define CONFIG_CMD_PING
76f7fa2f37SBo Shen #define CONFIG_CMD_DHCP
77f7fa2f37SBo Shen #define CONFIG_CMD_NAND
781d7442e6SBo Shen #define CONFIG_CMD_SF
793a49cd7eSWu, Josh #define CONFIG_CMD_MMC
80419fba0cSRichard Genoud #define CONFIG_CMD_FAT
81b030e731SRichard Genoud #define CONFIG_CMD_USB
82b030e731SRichard Genoud 
83b030e731SRichard Genoud /*
84b030e731SRichard Genoud  * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
85b030e731SRichard Genoud  * NB: in this case, USB 1.1 devices won't be recognized.
86b030e731SRichard Genoud  */
87b030e731SRichard Genoud 
88f7fa2f37SBo Shen 
89f7fa2f37SBo Shen /* SDRAM */
90f7fa2f37SBo Shen #define CONFIG_NR_DRAM_BANKS		1
91f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_BASE		0x20000000
92f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */
93f7fa2f37SBo Shen 
94f7fa2f37SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \
95f7fa2f37SBo Shen 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
96f7fa2f37SBo Shen 
97f7fa2f37SBo Shen /* DataFlash */
981d7442e6SBo Shen #ifdef CONFIG_CMD_SF
991d7442e6SBo Shen #define CONFIG_ATMEL_SPI
100f7fa2f37SBo Shen #define CONFIG_SPI_FLASH
101f7fa2f37SBo Shen #define CONFIG_SPI_FLASH_ATMEL
1021d7442e6SBo Shen #define CONFIG_SF_DEFAULT_SPEED		30000000
103f7fa2f37SBo Shen #endif
104f7fa2f37SBo Shen 
105f7fa2f37SBo Shen /* NAND flash */
106f7fa2f37SBo Shen #ifdef CONFIG_CMD_NAND
107f7fa2f37SBo Shen #define CONFIG_NAND_ATMEL
108f7fa2f37SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE	1
109f7fa2f37SBo Shen #define CONFIG_SYS_NAND_BASE		0x40000000
110f7fa2f37SBo Shen #define CONFIG_SYS_NAND_DBW_8		1
111f7fa2f37SBo Shen /* our ALE is AD21 */
112f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
113f7fa2f37SBo Shen /* our CLE is AD22 */
114f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
115f7fa2f37SBo Shen #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
116f7fa2f37SBo Shen #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
117f7fa2f37SBo Shen 
118df95321cSWu, Josh /* PMECC & PMERRLOC */
119df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HWECC		1
120df95321cSWu, Josh #define CONFIG_ATMEL_NAND_HW_PMECC	1
121df95321cSWu, Josh #define CONFIG_PMECC_CAP		2
122df95321cSWu, Josh #define CONFIG_PMECC_SECTOR_SIZE	512
123df95321cSWu, Josh 
124ce76f0aaSBo Shen #define CONFIG_CMD_NAND_TRIMFFS
125ce76f0aaSBo Shen 
126f7fa2f37SBo Shen #define CONFIG_MTD_DEVICE
127f7fa2f37SBo Shen #define CONFIG_CMD_MTDPARTS
128f7fa2f37SBo Shen #define CONFIG_MTD_PARTITIONS
129f7fa2f37SBo Shen #define CONFIG_RBTREE
130f7fa2f37SBo Shen #define CONFIG_LZO
131f7fa2f37SBo Shen #define CONFIG_CMD_UBI
132f7fa2f37SBo Shen #define CONFIG_CMD_UBIFS
133f7fa2f37SBo Shen #endif
134f7fa2f37SBo Shen 
1353a49cd7eSWu, Josh /* MMC */
1363a49cd7eSWu, Josh #ifdef CONFIG_CMD_MMC
1373a49cd7eSWu, Josh #define CONFIG_MMC
1383a49cd7eSWu, Josh #define CONFIG_GENERIC_MMC
1393a49cd7eSWu, Josh #define CONFIG_GENERIC_ATMEL_MCI
140419fba0cSRichard Genoud #endif
141419fba0cSRichard Genoud 
142419fba0cSRichard Genoud /* FAT */
143419fba0cSRichard Genoud #ifdef CONFIG_CMD_FAT
1443a49cd7eSWu, Josh #define CONFIG_DOS_PARTITION
1453a49cd7eSWu, Josh #endif
1463a49cd7eSWu, Josh 
147f7fa2f37SBo Shen /* Ethernet */
148f7fa2f37SBo Shen #define CONFIG_MACB
149f7fa2f37SBo Shen #define CONFIG_RMII
150f7fa2f37SBo Shen #define CONFIG_NET_RETRY_COUNT		20
151f7fa2f37SBo Shen #define CONFIG_MACB_SEARCH_PHY
152f7fa2f37SBo Shen 
153b030e731SRichard Genoud /* USB */
154b030e731SRichard Genoud #ifdef CONFIG_CMD_USB
155b030e731SRichard Genoud #ifdef CONFIG_USB_EHCI
156b030e731SRichard Genoud #define CONFIG_USB_EHCI_ATMEL
157b030e731SRichard Genoud #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
158b030e731SRichard Genoud #else
159dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL
160dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
161b030e731SRichard Genoud #define CONFIG_USB_OHCI_NEW
162b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_CPU_INIT
163b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
164b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
165b030e731SRichard Genoud #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
166b030e731SRichard Genoud #endif
167b030e731SRichard Genoud #define CONFIG_USB_STORAGE
168b030e731SRichard Genoud #endif
169b030e731SRichard Genoud 
170f7fa2f37SBo Shen #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
171f7fa2f37SBo Shen 
172f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
173f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_END		0x26e00000
174f7fa2f37SBo Shen 
175f7fa2f37SBo Shen #ifdef CONFIG_SYS_USE_NANDFLASH
176f7fa2f37SBo Shen /* bootstrap + u-boot + env + linux in nandflash */
177f7fa2f37SBo Shen #define CONFIG_ENV_IS_IN_NAND
178f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET		0xc0000
179f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET_REDUND	0x100000
180f7fa2f37SBo Shen #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
181f7fa2f37SBo Shen #define CONFIG_BOOTCOMMAND	"nand read " \
182f7fa2f37SBo Shen 				"0x22000000 0x200000 0x300000; " \
183f7fa2f37SBo Shen 				"bootm 0x22000000"
184b7e3129eSWu, Josh #elif defined(CONFIG_SYS_USE_SPIFLASH)
1851d7442e6SBo Shen /* bootstrap + u-boot + env + linux in spi flash */
1861d7442e6SBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH
1871d7442e6SBo Shen #define CONFIG_ENV_OFFSET	0x5000
1881d7442e6SBo Shen #define CONFIG_ENV_SIZE		0x3000
1891d7442e6SBo Shen #define CONFIG_ENV_SECT_SIZE	0x1000
1901d7442e6SBo Shen #define CONFIG_ENV_SPI_MAX_HZ	30000000
1911d7442e6SBo Shen #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
1921d7442e6SBo Shen 				"sf read 0x22000000 0x100000 0x300000; " \
1931d7442e6SBo Shen 				"bootm 0x22000000"
194961ffc77SBo Shen #elif defined(CONFIG_SYS_USE_DATAFLASH)
195961ffc77SBo Shen /* bootstrap + u-boot + env + linux in data flash */
196961ffc77SBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH
197961ffc77SBo Shen #define CONFIG_ENV_OFFSET	0x4200
198961ffc77SBo Shen #define CONFIG_ENV_SIZE		0x4200
199961ffc77SBo Shen #define CONFIG_ENV_SECT_SIZE	0x210
200961ffc77SBo Shen #define CONFIG_ENV_SPI_MAX_HZ	30000000
201961ffc77SBo Shen #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
202961ffc77SBo Shen 				"sf read 0x22000000 0x84000 0x294000; " \
203961ffc77SBo Shen 				"bootm 0x22000000"
204b7e3129eSWu, Josh #else /* CONFIG_SYS_USE_MMC */
205b7e3129eSWu, Josh /* bootstrap + u-boot + env + linux in mmc */
206*26961772SWu, Josh #define CONFIG_ENV_IS_IN_FAT
207*26961772SWu, Josh #define CONFIG_FAT_WRITE
208*26961772SWu, Josh #define FAT_ENV_INTERFACE	"mmc"
209*26961772SWu, Josh #define FAT_ENV_FILE		"uboot.env"
210*26961772SWu, Josh #define FAT_ENV_DEVICE_AND_PART "0"
211*26961772SWu, Josh #define CONFIG_ENV_SIZE		0x4000
212f7fa2f37SBo Shen #endif
213f7fa2f37SBo Shen 
214b7e3129eSWu, Josh #ifdef CONFIG_SYS_USE_MMC
215b7e3129eSWu, Josh #define CONFIG_BOOTARGS		"mem=128M console=ttyS0,115200 " \
216b7e3129eSWu, Josh 				"mtdparts=atmel_nand:" \
217b7e3129eSWu, Josh 				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
218b7e3129eSWu, Josh 				"root=/dev/mmcblk0p2 " \
219b7e3129eSWu, Josh 				"rw rootfstype=ext4 rootwait"
220b7e3129eSWu, Josh #else
2210c58cfa9SBo Shen #define CONFIG_BOOTARGS							\
2220c58cfa9SBo Shen 	"console=ttyS0,115200 earlyprintk "				\
2230c58cfa9SBo Shen 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
2240c58cfa9SBo Shen 	"256k(env),256k(env_redundant),256k(spare),"			\
2250c58cfa9SBo Shen 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
2260c58cfa9SBo Shen 	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
227b7e3129eSWu, Josh #endif
228f7fa2f37SBo Shen 
229f7fa2f37SBo Shen #define CONFIG_BAUDRATE		115200
230f7fa2f37SBo Shen 
231f7fa2f37SBo Shen #define CONFIG_SYS_PROMPT	"U-Boot> "
232f7fa2f37SBo Shen #define CONFIG_SYS_CBSIZE	256
233f7fa2f37SBo Shen #define CONFIG_SYS_MAXARGS	16
234f7fa2f37SBo Shen #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
235f7fa2f37SBo Shen 					+ 16)
236f7fa2f37SBo Shen #define CONFIG_SYS_LONGHELP
237f7fa2f37SBo Shen #define CONFIG_CMDLINE_EDITING
238f7fa2f37SBo Shen #define CONFIG_AUTO_COMPLETE
239f7fa2f37SBo Shen #define CONFIG_SYS_HUSH_PARSER
240f7fa2f37SBo Shen 
241f7fa2f37SBo Shen /*
242f7fa2f37SBo Shen  * Size of malloc() pool
243f7fa2f37SBo Shen  */
244f7fa2f37SBo Shen #define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)
245f7fa2f37SBo Shen 
246f7fa2f37SBo Shen #endif
247