1f7fa2f37SBo Shen /* 2f7fa2f37SBo Shen * Copyright (C) 2012 Atmel Corporation 3f7fa2f37SBo Shen * 4f7fa2f37SBo Shen * Configuation settings for the AT91SAM9X5EK board. 5f7fa2f37SBo Shen * 6f7fa2f37SBo Shen * See file CREDITS for list of people who contributed to this 7f7fa2f37SBo Shen * project. 8f7fa2f37SBo Shen * 9f7fa2f37SBo Shen * This program is free software; you can redistribute it and/or 10f7fa2f37SBo Shen * modify it under the terms of the GNU General Public License as 11f7fa2f37SBo Shen * published by the Free Software Foundation; either version 2 of 12f7fa2f37SBo Shen * the License, or (at your option) any later version. 13f7fa2f37SBo Shen * 14f7fa2f37SBo Shen * This program is distributed in the hope that it will be useful, 15f7fa2f37SBo Shen * but WITHOUT ANY WARRANTY; without even the implied warranty of 16f7fa2f37SBo Shen * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17f7fa2f37SBo Shen * GNU General Public License for more details. 18f7fa2f37SBo Shen * 19f7fa2f37SBo Shen * You should have received a copy of the GNU General Public License 20f7fa2f37SBo Shen * along with this program; if not, write to the Free Software 21f7fa2f37SBo Shen * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22f7fa2f37SBo Shen * MA 02111-1307 USA 23f7fa2f37SBo Shen */ 24f7fa2f37SBo Shen 25f7fa2f37SBo Shen #ifndef __CONFIG_H__ 26f7fa2f37SBo Shen #define __CONFIG_H__ 27f7fa2f37SBo Shen 28f7fa2f37SBo Shen #include <asm/hardware.h> 29f7fa2f37SBo Shen 30f7fa2f37SBo Shen /* ARM asynchronous clock */ 31f7fa2f37SBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 32f7fa2f37SBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 33f7fa2f37SBo Shen #define CONFIG_SYS_HZ 1000 34f7fa2f37SBo Shen 35f7fa2f37SBo Shen #define CONFIG_AT91SAM9X5EK 36f7fa2f37SBo Shen #define CONFIG_AT91FAMILY 37f7fa2f37SBo Shen 38f7fa2f37SBo Shen #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 39f7fa2f37SBo Shen #define CONFIG_SETUP_MEMORY_TAGS 40f7fa2f37SBo Shen #define CONFIG_INITRD_TAG 41f7fa2f37SBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT 42f7fa2f37SBo Shen #define CONFIG_BOARD_EARLY_INIT_F 43f7fa2f37SBo Shen #define CONFIG_DISPLAY_CPUINFO 44f7fa2f37SBo Shen 45f7fa2f37SBo Shen /* general purpose I/O */ 46f7fa2f37SBo Shen #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 47f7fa2f37SBo Shen #define CONFIG_AT91_GPIO 48f7fa2f37SBo Shen 49f7fa2f37SBo Shen /* serial console */ 50f7fa2f37SBo Shen #define CONFIG_ATMEL_USART 51f7fa2f37SBo Shen #define CONFIG_USART_BASE ATMEL_BASE_DBGU 52f7fa2f37SBo Shen #define CONFIG_USART_ID ATMEL_ID_SYS 53f7fa2f37SBo Shen 54f7fa2f37SBo Shen /* LCD */ 55f7fa2f37SBo Shen #define CONFIG_LCD 56f7fa2f37SBo Shen #define LCD_BPP LCD_COLOR16 57f7fa2f37SBo Shen #define LCD_OUTPUT_BPP 24 58f7fa2f37SBo Shen #define CONFIG_LCD_LOGO 59f7fa2f37SBo Shen #undef LCD_TEST_PATTERN 60f7fa2f37SBo Shen #define CONFIG_LCD_INFO 61f7fa2f37SBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO 62f7fa2f37SBo Shen #define CONFIG_SYS_WHITE_ON_BLACK 63f7fa2f37SBo Shen #define CONFIG_ATMEL_HLCD 64f7fa2f37SBo Shen #define CONFIG_ATMEL_LCD_RGB565 65f7fa2f37SBo Shen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 66f7fa2f37SBo Shen 67f7fa2f37SBo Shen #define CONFIG_BOOTDELAY 3 68f7fa2f37SBo Shen 69f7fa2f37SBo Shen /* 70f7fa2f37SBo Shen * BOOTP options 71f7fa2f37SBo Shen */ 72f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTFILESIZE 73f7fa2f37SBo Shen #define CONFIG_BOOTP_BOOTPATH 74f7fa2f37SBo Shen #define CONFIG_BOOTP_GATEWAY 75f7fa2f37SBo Shen #define CONFIG_BOOTP_HOSTNAME 76f7fa2f37SBo Shen 77f7fa2f37SBo Shen /* 78f7fa2f37SBo Shen * Command line configuration. 79f7fa2f37SBo Shen */ 80f7fa2f37SBo Shen #include <config_cmd_default.h> 81f7fa2f37SBo Shen #undef CONFIG_CMD_FPGA 82f7fa2f37SBo Shen #undef CONFIG_CMD_IMI 83f7fa2f37SBo Shen #undef CONFIG_CMD_IMLS 84f7fa2f37SBo Shen #undef CONFIG_CMD_LOADS 85f7fa2f37SBo Shen 86f7fa2f37SBo Shen #define CONFIG_CMD_PING 87f7fa2f37SBo Shen #define CONFIG_CMD_DHCP 88f7fa2f37SBo Shen #define CONFIG_CMD_NAND 89*1d7442e6SBo Shen #define CONFIG_CMD_SF 90f7fa2f37SBo Shen 91f7fa2f37SBo Shen /* SDRAM */ 92f7fa2f37SBo Shen #define CONFIG_NR_DRAM_BANKS 1 93f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_BASE 0x20000000 94f7fa2f37SBo Shen #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 95f7fa2f37SBo Shen 96f7fa2f37SBo Shen #define CONFIG_SYS_INIT_SP_ADDR \ 97f7fa2f37SBo Shen (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 98f7fa2f37SBo Shen 99f7fa2f37SBo Shen /* DataFlash */ 100*1d7442e6SBo Shen #ifdef CONFIG_CMD_SF 101*1d7442e6SBo Shen #define CONFIG_ATMEL_SPI 102f7fa2f37SBo Shen #define CONFIG_SPI_FLASH 103f7fa2f37SBo Shen #define CONFIG_SPI_FLASH_ATMEL 104*1d7442e6SBo Shen #define CONFIG_SF_DEFAULT_SPEED 30000000 105f7fa2f37SBo Shen #endif 106f7fa2f37SBo Shen 107f7fa2f37SBo Shen /* no NOR flash */ 108f7fa2f37SBo Shen #define CONFIG_SYS_NO_FLASH 109f7fa2f37SBo Shen 110f7fa2f37SBo Shen /* NAND flash */ 111f7fa2f37SBo Shen #ifdef CONFIG_CMD_NAND 112f7fa2f37SBo Shen #define CONFIG_NAND_ATMEL 113f7fa2f37SBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE 1 114f7fa2f37SBo Shen #define CONFIG_SYS_NAND_BASE 0x40000000 115f7fa2f37SBo Shen #define CONFIG_SYS_NAND_DBW_8 1 116f7fa2f37SBo Shen /* our ALE is AD21 */ 117f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 118f7fa2f37SBo Shen /* our CLE is AD22 */ 119f7fa2f37SBo Shen #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 120f7fa2f37SBo Shen #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 121f7fa2f37SBo Shen #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 122f7fa2f37SBo Shen 123f7fa2f37SBo Shen #define CONFIG_MTD_DEVICE 124f7fa2f37SBo Shen #define CONFIG_CMD_MTDPARTS 125f7fa2f37SBo Shen #define CONFIG_MTD_PARTITIONS 126f7fa2f37SBo Shen #define CONFIG_RBTREE 127f7fa2f37SBo Shen #define CONFIG_LZO 128f7fa2f37SBo Shen #define CONFIG_CMD_UBI 129f7fa2f37SBo Shen #define CONFIG_CMD_UBIFS 130f7fa2f37SBo Shen #endif 131f7fa2f37SBo Shen 132f7fa2f37SBo Shen /* Ethernet */ 133f7fa2f37SBo Shen #define CONFIG_MACB 134f7fa2f37SBo Shen #define CONFIG_RMII 135f7fa2f37SBo Shen #define CONFIG_NET_RETRY_COUNT 20 136f7fa2f37SBo Shen #define CONFIG_MACB_SEARCH_PHY 137f7fa2f37SBo Shen 138f7fa2f37SBo Shen #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 139f7fa2f37SBo Shen 140f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 141f7fa2f37SBo Shen #define CONFIG_SYS_MEMTEST_END 0x26e00000 142f7fa2f37SBo Shen 143f7fa2f37SBo Shen #ifdef CONFIG_SYS_USE_NANDFLASH 144f7fa2f37SBo Shen /* bootstrap + u-boot + env + linux in nandflash */ 145f7fa2f37SBo Shen #define CONFIG_ENV_IS_IN_NAND 146f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET 0xc0000 147f7fa2f37SBo Shen #define CONFIG_ENV_OFFSET_REDUND 0x100000 148f7fa2f37SBo Shen #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 149f7fa2f37SBo Shen #define CONFIG_BOOTCOMMAND "nand read " \ 150f7fa2f37SBo Shen "0x22000000 0x200000 0x300000; " \ 151f7fa2f37SBo Shen "bootm 0x22000000" 152*1d7442e6SBo Shen #else 153*1d7442e6SBo Shen #ifdef CONFIG_SYS_USE_SPIFLASH 154*1d7442e6SBo Shen /* bootstrap + u-boot + env + linux in spi flash */ 155*1d7442e6SBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH 156*1d7442e6SBo Shen #define CONFIG_ENV_OFFSET 0x5000 157*1d7442e6SBo Shen #define CONFIG_ENV_SIZE 0x3000 158*1d7442e6SBo Shen #define CONFIG_ENV_SECT_SIZE 0x1000 159*1d7442e6SBo Shen #define CONFIG_ENV_SPI_MAX_HZ 30000000 160*1d7442e6SBo Shen #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 161*1d7442e6SBo Shen "sf read 0x22000000 0x100000 0x300000; " \ 162*1d7442e6SBo Shen "bootm 0x22000000" 163*1d7442e6SBo Shen #endif 164f7fa2f37SBo Shen #endif 165f7fa2f37SBo Shen 166f7fa2f37SBo Shen #define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ 167f7fa2f37SBo Shen "mtdparts=atmel_nand:" \ 168f7fa2f37SBo Shen "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ 169f7fa2f37SBo Shen "root=/dev/mtdblock1 rw " \ 170f7fa2f37SBo Shen "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs" 171f7fa2f37SBo Shen 172f7fa2f37SBo Shen #define CONFIG_BAUDRATE 115200 173f7fa2f37SBo Shen 174f7fa2f37SBo Shen #define CONFIG_SYS_PROMPT "U-Boot> " 175f7fa2f37SBo Shen #define CONFIG_SYS_CBSIZE 256 176f7fa2f37SBo Shen #define CONFIG_SYS_MAXARGS 16 177f7fa2f37SBo Shen #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \ 178f7fa2f37SBo Shen + 16) 179f7fa2f37SBo Shen #define CONFIG_SYS_LONGHELP 180f7fa2f37SBo Shen #define CONFIG_CMDLINE_EDITING 181f7fa2f37SBo Shen #define CONFIG_AUTO_COMPLETE 182f7fa2f37SBo Shen #define CONFIG_SYS_HUSH_PARSER 183f7fa2f37SBo Shen 184f7fa2f37SBo Shen /* 185f7fa2f37SBo Shen * Size of malloc() pool 186f7fa2f37SBo Shen */ 187f7fa2f37SBo Shen #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 188f7fa2f37SBo Shen 189f7fa2f37SBo Shen #ifdef CONFIG_USE_IRQ 190f7fa2f37SBo Shen #error CONFIG_USE_IRQ not supported 191f7fa2f37SBo Shen #endif 192f7fa2f37SBo Shen 193f7fa2f37SBo Shen #endif 194