12118ebb4SStelian Pop /* 22118ebb4SStelian Pop * (C) Copyright 2007-2008 32118ebb4SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 42118ebb4SStelian Pop * Lead Tech Design <www.leadtechdesign.com> 52118ebb4SStelian Pop * 62118ebb4SStelian Pop * Configuation settings for the AT91SAM9RLEK board. 72118ebb4SStelian Pop * 82118ebb4SStelian Pop * See file CREDITS for list of people who contributed to this 92118ebb4SStelian Pop * project. 102118ebb4SStelian Pop * 112118ebb4SStelian Pop * This program is free software; you can redistribute it and/or 122118ebb4SStelian Pop * modify it under the terms of the GNU General Public License as 132118ebb4SStelian Pop * published by the Free Software Foundation; either version 2 of 142118ebb4SStelian Pop * the License, or (at your option) any later version. 152118ebb4SStelian Pop * 162118ebb4SStelian Pop * This program is distributed in the hope that it will be useful, 172118ebb4SStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 182118ebb4SStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 192118ebb4SStelian Pop * GNU General Public License for more details. 202118ebb4SStelian Pop * 212118ebb4SStelian Pop * You should have received a copy of the GNU General Public License 222118ebb4SStelian Pop * along with this program; if not, write to the Free Software 232118ebb4SStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 242118ebb4SStelian Pop * MA 02111-1307 USA 252118ebb4SStelian Pop */ 262118ebb4SStelian Pop 272118ebb4SStelian Pop #ifndef __CONFIG_H 282118ebb4SStelian Pop #define __CONFIG_H 292118ebb4SStelian Pop 302118ebb4SStelian Pop /* ARM asynchronous clock */ 31761c70b8SStelian Pop #define AT91_CPU_NAME "AT91SAM9RL" 32ad229a44SStelian Pop #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ 342118ebb4SStelian Pop 352118ebb4SStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 362118ebb4SStelian Pop #define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/ 372118ebb4SStelian Pop #define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */ 38*dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT 392118ebb4SStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 402118ebb4SStelian Pop 412118ebb4SStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 422118ebb4SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 432118ebb4SStelian Pop #define CONFIG_INITRD_TAG 1 442118ebb4SStelian Pop 452118ebb4SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 462118ebb4SStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 472118ebb4SStelian Pop 482118ebb4SStelian Pop /* 492118ebb4SStelian Pop * Hardware drivers 502118ebb4SStelian Pop */ 512118ebb4SStelian Pop #define CONFIG_ATMEL_USART 1 522118ebb4SStelian Pop #undef CONFIG_USART0 532118ebb4SStelian Pop #undef CONFIG_USART1 542118ebb4SStelian Pop #undef CONFIG_USART2 552118ebb4SStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 562118ebb4SStelian Pop 57761c70b8SStelian Pop /* LCD */ 58761c70b8SStelian Pop #define CONFIG_LCD 1 59761c70b8SStelian Pop #define LCD_BPP LCD_COLOR8 60761c70b8SStelian Pop #define CONFIG_LCD_LOGO 1 61761c70b8SStelian Pop #undef LCD_TEST_PATTERN 62761c70b8SStelian Pop #define CONFIG_LCD_INFO 1 63761c70b8SStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_WHITE_ON_BLACK 1 65761c70b8SStelian Pop #define CONFIG_ATMEL_LCD 1 66761c70b8SStelian Pop #define CONFIG_ATMEL_LCD_RGB565 1 676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 68761c70b8SStelian Pop 69a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 70a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 71a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ 72a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ 73a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ 74a484b00bSJean-Christophe PLAGNIOL-VILLARD 752118ebb4SStelian Pop #define CONFIG_BOOTDELAY 3 762118ebb4SStelian Pop 772118ebb4SStelian Pop /* 782118ebb4SStelian Pop * Command line configuration. 792118ebb4SStelian Pop */ 802118ebb4SStelian Pop #include <config_cmd_default.h> 812118ebb4SStelian Pop #undef CONFIG_CMD_BDI 822118ebb4SStelian Pop #undef CONFIG_CMD_FPGA 8374de7aefSWolfgang Denk #undef CONFIG_CMD_IMI 842118ebb4SStelian Pop #undef CONFIG_CMD_IMLS 8574de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS 862118ebb4SStelian Pop #undef CONFIG_CMD_NET 8774de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE 882118ebb4SStelian Pop #undef CONFIG_CMD_USB 892118ebb4SStelian Pop 902118ebb4SStelian Pop #define CONFIG_CMD_NAND 1 912118ebb4SStelian Pop 922118ebb4SStelian Pop /* SDRAM */ 932118ebb4SStelian Pop #define CONFIG_NR_DRAM_BANKS 1 942118ebb4SStelian Pop #define PHYS_SDRAM 0x20000000 952118ebb4SStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 962118ebb4SStelian Pop 972118ebb4SStelian Pop /* DataFlash */ 984758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI 992118ebb4SStelian Pop #define CONFIG_HAS_DATAFLASH 1 1006d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1016d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 1026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1032118ebb4SStelian Pop #define AT91_SPI_CLK 15000000 1042118ebb4SStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 1052118ebb4SStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1062118ebb4SStelian Pop 1072118ebb4SStelian Pop /* NOR flash - not present */ 1086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 1092118ebb4SStelian Pop 1102118ebb4SStelian Pop /* NAND flash */ 11174c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 11274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 1136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1156d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 11674c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */ 11774c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 11874c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */ 11974c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 12074c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 12174c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 12274c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 1232118ebb4SStelian Pop 1242118ebb4SStelian Pop /* Ethernet - not present */ 1252118ebb4SStelian Pop 1262118ebb4SStelian Pop /* USB - not supported */ 1272118ebb4SStelian Pop 1286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1292118ebb4SStelian Pop 1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 1322118ebb4SStelian Pop 1336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH 1342118ebb4SStelian Pop 1352118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 136057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1376d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1380e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1400e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 1412118ebb4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 1422118ebb4SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1432118ebb4SStelian Pop "root=/dev/mtdblock0 " \ 1442118ebb4SStelian Pop "mtdparts=at91_nand:-(root) "\ 1452118ebb4SStelian Pop "rw rootfstype=jffs2" 1462118ebb4SStelian Pop 1476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 1482118ebb4SStelian Pop 1492118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 15051bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 1510e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 1520e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 1530e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1542118ebb4SStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 1552118ebb4SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1562118ebb4SStelian Pop "root=/dev/mtdblock5 " \ 1572118ebb4SStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ 1582118ebb4SStelian Pop "rw rootfstype=jffs2" 1592118ebb4SStelian Pop 1602118ebb4SStelian Pop #endif 1612118ebb4SStelian Pop 1622118ebb4SStelian Pop #define CONFIG_BAUDRATE 115200 1636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 1642118ebb4SStelian Pop 1656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 1666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 1676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 1686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 1696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 1702118ebb4SStelian Pop #define CONFIG_CMDLINE_EDITING 1 1712118ebb4SStelian Pop 1722118ebb4SStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 1732118ebb4SStelian Pop /* 1742118ebb4SStelian Pop * Size of malloc() pool 1752118ebb4SStelian Pop */ 1766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 1776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 1782118ebb4SStelian Pop 1792118ebb4SStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 1802118ebb4SStelian Pop 1812118ebb4SStelian Pop #ifdef CONFIG_USE_IRQ 1822118ebb4SStelian Pop #error CONFIG_USE_IRQ not supported 1832118ebb4SStelian Pop #endif 1842118ebb4SStelian Pop 1852118ebb4SStelian Pop #endif 186