12118ebb4SStelian Pop /* 22118ebb4SStelian Pop * (C) Copyright 2007-2008 3c9e798d3SStelian Pop * Stelian Pop <stelian@popies.net> 42118ebb4SStelian Pop * Lead Tech Design <www.leadtechdesign.com> 52118ebb4SStelian Pop * 62118ebb4SStelian Pop * Configuation settings for the AT91SAM9RLEK board. 72118ebb4SStelian Pop * 81a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 92118ebb4SStelian Pop */ 102118ebb4SStelian Pop 112118ebb4SStelian Pop #ifndef __CONFIG_H 122118ebb4SStelian Pop #define __CONFIG_H 132118ebb4SStelian Pop 1421d671d0SXu, Hong #include <asm/hardware.h> 1521d671d0SXu, Hong 1621d671d0SXu, Hong #define CONFIG_SYS_TEXT_BASE 0x21F00000 17425de62dSJens Scharsig 182118ebb4SStelian Pop /* ARM asynchronous clock */ 1921d671d0SXu, Hong #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 2021d671d0SXu, Hong #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ 212118ebb4SStelian Pop 2221d671d0SXu, Hong #define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */ 2321d671d0SXu, Hong 24dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT 2521d671d0SXu, Hong #define CONFIG_SKIP_LOWLEVEL_INIT 2621d671d0SXu, Hong #define CONFIG_BOARD_EARLY_INIT_F 272118ebb4SStelian Pop 282118ebb4SStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 292118ebb4SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 302118ebb4SStelian Pop #define CONFIG_INITRD_TAG 1 312118ebb4SStelian Pop 3221d671d0SXu, Hong #define CONFIG_ATMEL_LEGACY 3321d671d0SXu, Hong #define CONFIG_AT91_GPIO 1 3421d671d0SXu, Hong #define CONFIG_AT91_GPIO_PULLUP 1 352118ebb4SStelian Pop 362118ebb4SStelian Pop /* 372118ebb4SStelian Pop * Hardware drivers 382118ebb4SStelian Pop */ 3921d671d0SXu, Hong 4021d671d0SXu, Hong /* serial console */ 4121d671d0SXu, Hong #define CONFIG_ATMEL_USART 4221d671d0SXu, Hong #define CONFIG_USART_BASE ATMEL_BASE_DBGU 4321d671d0SXu, Hong #define CONFIG_USART_ID ATMEL_ID_SYS 4421d671d0SXu, Hong #define CONFIG_BAUDRATE 115200 452118ebb4SStelian Pop 46761c70b8SStelian Pop /* LCD */ 47761c70b8SStelian Pop #define LCD_BPP LCD_COLOR8 48761c70b8SStelian Pop #define CONFIG_LCD_LOGO 1 49761c70b8SStelian Pop #undef LCD_TEST_PATTERN 50761c70b8SStelian Pop #define CONFIG_LCD_INFO 1 51761c70b8SStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_WHITE_ON_BLACK 1 53761c70b8SStelian Pop #define CONFIG_ATMEL_LCD 1 54761c70b8SStelian Pop #define CONFIG_ATMEL_LCD_RGB565 1 5521d671d0SXu, Hong /* Let board_init_f handle the framebuffer allocation */ 5621d671d0SXu, Hong #undef CONFIG_FB_ADDR 57761c70b8SStelian Pop 58a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 59a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 60a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ 61a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ 62a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ 63a484b00bSJean-Christophe PLAGNIOL-VILLARD 642118ebb4SStelian Pop 652118ebb4SStelian Pop /* 662118ebb4SStelian Pop * Command line configuration. 672118ebb4SStelian Pop */ 682118ebb4SStelian Pop 692118ebb4SStelian Pop #define CONFIG_CMD_NAND 1 702118ebb4SStelian Pop 712118ebb4SStelian Pop /* SDRAM */ 722118ebb4SStelian Pop #define CONFIG_NR_DRAM_BANKS 1 7321d671d0SXu, Hong #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 7421d671d0SXu, Hong #define CONFIG_SYS_SDRAM_SIZE 0x04000000 7521d671d0SXu, Hong 7621d671d0SXu, Hong #define CONFIG_SYS_INIT_SP_ADDR \ 7721d671d0SXu, Hong (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) 782118ebb4SStelian Pop 792118ebb4SStelian Pop /* DataFlash */ 804758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI 812118ebb4SStelian Pop #define CONFIG_HAS_DATAFLASH 1 826d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 842118ebb4SStelian Pop #define AT91_SPI_CLK 15000000 852118ebb4SStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 862118ebb4SStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 872118ebb4SStelian Pop 882118ebb4SStelian Pop /* NOR flash - not present */ 896d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 902118ebb4SStelian Pop 912118ebb4SStelian Pop /* NAND flash */ 9274c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 9374c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 9521d671d0SXu, Hong #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 9774c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */ 9874c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 9974c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */ 10074c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 10174c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 10274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 1032eb99ca8SWolfgang Denk 10474c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 1052118ebb4SStelian Pop 106111ec4c6SWu, Josh /* MMC */ 107111ec4c6SWu, Josh 108111ec4c6SWu, Josh #ifdef CONFIG_CMD_MMC 109111ec4c6SWu, Josh #define CONFIG_MMC 110111ec4c6SWu, Josh #define CONFIG_GENERIC_MMC 111111ec4c6SWu, Josh #define CONFIG_GENERIC_ATMEL_MCI 112111ec4c6SWu, Josh #define CONFIG_DOS_PARTITION 113111ec4c6SWu, Josh #endif 114111ec4c6SWu, Josh 1152118ebb4SStelian Pop /* Ethernet - not present */ 1162118ebb4SStelian Pop 1172118ebb4SStelian Pop /* USB - not supported */ 1182118ebb4SStelian Pop 1196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1202118ebb4SStelian Pop 12121d671d0SXu, Hong #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 1226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 1232118ebb4SStelian Pop 1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH 1252118ebb4SStelian Pop 1262118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 127057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1290e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1310e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 132e139cb31SAlexandre Belloni #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" 1332118ebb4SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1342118ebb4SStelian Pop "root=/dev/mtdblock0 " \ 135918319c7SAlbin Tonnerre "mtdparts=atmel_nand:-(root) "\ 1362118ebb4SStelian Pop "rw rootfstype=jffs2" 1372118ebb4SStelian Pop 1380b128434SWu, Josh #elif CONFIG_SYS_USE_NANDFLASH 1392118ebb4SStelian Pop 1402118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 14151bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 14265b553b7SWu, Josh #define CONFIG_ENV_OFFSET 0xc0000 14365b553b7SWu, Josh #define CONFIG_ENV_OFFSET_REDUND 0x100000 1440e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 14565b553b7SWu, Josh #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \ 14665b553b7SWu, Josh "nand read 0x21000000 0x180000 0x80000; " \ 14765b553b7SWu, Josh "bootz 0x22000000 - 0x21000000" 14865b553b7SWu, Josh #define CONFIG_BOOTARGS \ 14965b553b7SWu, Josh "console=ttyS0,115200 earlyprintk " \ 15065b553b7SWu, Josh "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 151*ae5070d6SRobert P. J. Day "256K(env),256k(env_redundant),256k(spare)," \ 15265b553b7SWu, Josh "512k(dtb),6M(kernel)ro,-(rootfs) " \ 15365b553b7SWu, Josh "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" 1542118ebb4SStelian Pop 1550b128434SWu, Josh #else /* CONFIG_SYS_USE_MMC */ 1560b128434SWu, Josh 1570b128434SWu, Josh /* bootstrap + u-boot + env + linux in mmc */ 1580b128434SWu, Josh #define CONFIG_ENV_IS_IN_FAT 1590b128434SWu, Josh #define CONFIG_FAT_WRITE 1600b128434SWu, Josh #define FAT_ENV_INTERFACE "mmc" 1610b128434SWu, Josh #define FAT_ENV_FILE "uboot.env" 1620b128434SWu, Josh #define FAT_ENV_DEVICE_AND_PART "0" 1630b128434SWu, Josh #define CONFIG_ENV_SIZE 0x4000 1640b128434SWu, Josh #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \ 1650b128434SWu, Josh "fatload mmc 0:1 0x22000000 zImage; " \ 1660b128434SWu, Josh "bootz 0x22000000 - 0x21000000" 1670b128434SWu, Josh #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1680b128434SWu, Josh "mtdparts=atmel_nand:" \ 1690b128434SWu, Josh "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ 1700b128434SWu, Josh "root=/dev/mmcblk0p2 rw rootwait" 1712118ebb4SStelian Pop #endif 1722118ebb4SStelian Pop 1736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 1746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 1762118ebb4SStelian Pop #define CONFIG_CMDLINE_EDITING 1 177e139cb31SAlexandre Belloni #define CONFIG_AUTO_COMPLETE 1782118ebb4SStelian Pop 1792118ebb4SStelian Pop /* 1802118ebb4SStelian Pop * Size of malloc() pool 1812118ebb4SStelian Pop */ 1826d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 1832118ebb4SStelian Pop 1842118ebb4SStelian Pop #endif 185