xref: /rk3399_rockchip-uboot/include/configs/at91sam9rlek.h (revision 2011dca2c1d19fd561c77d3e851247444c3b11e1)
12118ebb4SStelian Pop /*
22118ebb4SStelian Pop  * (C) Copyright 2007-2008
3c9e798d3SStelian Pop  * Stelian Pop <stelian@popies.net>
42118ebb4SStelian Pop  * Lead Tech Design <www.leadtechdesign.com>
52118ebb4SStelian Pop  *
62118ebb4SStelian Pop  * Configuation settings for the AT91SAM9RLEK board.
72118ebb4SStelian Pop  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
92118ebb4SStelian Pop  */
102118ebb4SStelian Pop 
112118ebb4SStelian Pop #ifndef __CONFIG_H
122118ebb4SStelian Pop #define __CONFIG_H
132118ebb4SStelian Pop 
1421d671d0SXu, Hong #include <asm/hardware.h>
1521d671d0SXu, Hong 
1621d671d0SXu, Hong #define CONFIG_SYS_TEXT_BASE		0x21F00000
17425de62dSJens Scharsig 
182118ebb4SStelian Pop /* ARM asynchronous clock */
1921d671d0SXu, Hong #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
2021d671d0SXu, Hong #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* main clock xtal */
212118ebb4SStelian Pop 
2221d671d0SXu, Hong #define CONFIG_AT91SAM9RLEK		1	/* It's an AT91SAM9RLEK Board */
2321d671d0SXu, Hong 
24dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT
2521d671d0SXu, Hong #define CONFIG_SKIP_LOWLEVEL_INIT
262118ebb4SStelian Pop 
272118ebb4SStelian Pop #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
282118ebb4SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS	1
292118ebb4SStelian Pop #define CONFIG_INITRD_TAG		1
302118ebb4SStelian Pop 
3121d671d0SXu, Hong #define CONFIG_ATMEL_LEGACY
322118ebb4SStelian Pop 
332118ebb4SStelian Pop /*
342118ebb4SStelian Pop  * Hardware drivers
352118ebb4SStelian Pop  */
3621d671d0SXu, Hong 
37761c70b8SStelian Pop /* LCD */
38761c70b8SStelian Pop #define LCD_BPP				LCD_COLOR8
39761c70b8SStelian Pop #define CONFIG_LCD_LOGO			1
40761c70b8SStelian Pop #undef LCD_TEST_PATTERN
41761c70b8SStelian Pop #define CONFIG_LCD_INFO			1
42761c70b8SStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO	1
43761c70b8SStelian Pop #define CONFIG_ATMEL_LCD		1
44761c70b8SStelian Pop #define CONFIG_ATMEL_LCD_RGB565		1
4521d671d0SXu, Hong /* Let board_init_f handle the framebuffer allocation */
4621d671d0SXu, Hong #undef CONFIG_FB_ADDR
47761c70b8SStelian Pop 
482118ebb4SStelian Pop /*
492118ebb4SStelian Pop  * Command line configuration.
502118ebb4SStelian Pop  */
512118ebb4SStelian Pop 
522118ebb4SStelian Pop #define CONFIG_CMD_NAND			1
532118ebb4SStelian Pop 
542118ebb4SStelian Pop /* SDRAM */
552118ebb4SStelian Pop #define CONFIG_NR_DRAM_BANKS		1
5621d671d0SXu, Hong #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
5721d671d0SXu, Hong #define CONFIG_SYS_SDRAM_SIZE		0x04000000
5821d671d0SXu, Hong 
5921d671d0SXu, Hong #define CONFIG_SYS_INIT_SP_ADDR \
60*2011dca2SWenyou Yang 	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
612118ebb4SStelian Pop 
622118ebb4SStelian Pop /* DataFlash */
634758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI
642118ebb4SStelian Pop #define CONFIG_HAS_DATAFLASH			1
656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
672118ebb4SStelian Pop #define AT91_SPI_CLK				15000000
682118ebb4SStelian Pop #define DATAFLASH_TCSS				(0x1a << 16)
692118ebb4SStelian Pop #define DATAFLASH_TCHS				(0x1 << 24)
702118ebb4SStelian Pop 
712118ebb4SStelian Pop /* NAND flash */
7274c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND
7374c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL
746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE		1
7521d671d0SXu, Hong #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8			1
7774c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */
7874c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
7974c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */
8074c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
8174c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PB6
8274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PD17
832eb99ca8SWolfgang Denk 
8474c076d6SJean-Christophe PLAGNIOL-VILLARD #endif
852118ebb4SStelian Pop 
862118ebb4SStelian Pop /* Ethernet - not present */
872118ebb4SStelian Pop 
882118ebb4SStelian Pop /* USB - not supported */
892118ebb4SStelian Pop 
906d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
912118ebb4SStelian Pop 
9221d671d0SXu, Hong #define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END			0x23e00000
942118ebb4SStelian Pop 
956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH
962118ebb4SStelian Pop 
972118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */
98057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH	1
996d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
1000e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x4200
1016d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
1020e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x4200
103e139cb31SAlexandre Belloni #define CONFIG_BOOTCOMMAND	"cp.b 0xC0084000 0x22000000 0x210000; bootm"
1042118ebb4SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
1052118ebb4SStelian Pop 				"root=/dev/mtdblock0 " \
106918319c7SAlbin Tonnerre 				"mtdparts=atmel_nand:-(root) "\
1072118ebb4SStelian Pop 				"rw rootfstype=jffs2"
1082118ebb4SStelian Pop 
1090b128434SWu, Josh #elif CONFIG_SYS_USE_NANDFLASH
1102118ebb4SStelian Pop 
1112118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */
11251bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND		1
113*2011dca2SWenyou Yang #define CONFIG_ENV_OFFSET		0x120000
11465b553b7SWu, Josh #define CONFIG_ENV_OFFSET_REDUND	0x100000
1150e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
11665b553b7SWu, Josh #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x600000; "	\
11765b553b7SWu, Josh 				"nand read 0x21000000 0x180000 0x80000; "	\
11865b553b7SWu, Josh 				"bootz 0x22000000 - 0x21000000"
11965b553b7SWu, Josh #define CONFIG_BOOTARGS		\
12065b553b7SWu, Josh 				"console=ttyS0,115200 earlyprintk "				\
12165b553b7SWu, Josh 				"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
122ae5070d6SRobert P. J. Day 				"256K(env),256k(env_redundant),256k(spare),"			\
12365b553b7SWu, Josh 				"512k(dtb),6M(kernel)ro,-(rootfs) "				\
12465b553b7SWu, Josh 				"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
1252118ebb4SStelian Pop 
1260b128434SWu, Josh #else /* CONFIG_SYS_USE_MMC */
1270b128434SWu, Josh 
1280b128434SWu, Josh /* bootstrap + u-boot + env + linux in mmc */
1290b128434SWu, Josh #define CONFIG_ENV_IS_IN_FAT
1300b128434SWu, Josh #define CONFIG_FAT_WRITE
1310b128434SWu, Josh #define FAT_ENV_INTERFACE	"mmc"
1320b128434SWu, Josh #define FAT_ENV_FILE		"uboot.env"
1330b128434SWu, Josh #define FAT_ENV_DEVICE_AND_PART	"0"
1340b128434SWu, Josh #define CONFIG_ENV_SIZE		0x4000
1350b128434SWu, Josh #define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
1360b128434SWu, Josh 				"fatload mmc 0:1 0x22000000 zImage; " \
1370b128434SWu, Josh 				"bootz 0x22000000 - 0x21000000"
1380b128434SWu, Josh #define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
1390b128434SWu, Josh 				"mtdparts=atmel_nand:" \
1400b128434SWu, Josh 				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
1410b128434SWu, Josh 				"root=/dev/mmcblk0p2 rw rootwait"
1422118ebb4SStelian Pop #endif
1432118ebb4SStelian Pop 
1446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256
1456d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16
1466d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP		1
1472118ebb4SStelian Pop #define CONFIG_CMDLINE_EDITING		1
148e139cb31SAlexandre Belloni #define CONFIG_AUTO_COMPLETE
1492118ebb4SStelian Pop 
1502118ebb4SStelian Pop /*
1512118ebb4SStelian Pop  * Size of malloc() pool
1522118ebb4SStelian Pop  */
1536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
1542118ebb4SStelian Pop 
1552118ebb4SStelian Pop #endif
156