12118ebb4SStelian Pop /* 22118ebb4SStelian Pop * (C) Copyright 2007-2008 32118ebb4SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 42118ebb4SStelian Pop * Lead Tech Design <www.leadtechdesign.com> 52118ebb4SStelian Pop * 62118ebb4SStelian Pop * Configuation settings for the AT91SAM9RLEK board. 72118ebb4SStelian Pop * 82118ebb4SStelian Pop * See file CREDITS for list of people who contributed to this 92118ebb4SStelian Pop * project. 102118ebb4SStelian Pop * 112118ebb4SStelian Pop * This program is free software; you can redistribute it and/or 122118ebb4SStelian Pop * modify it under the terms of the GNU General Public License as 132118ebb4SStelian Pop * published by the Free Software Foundation; either version 2 of 142118ebb4SStelian Pop * the License, or (at your option) any later version. 152118ebb4SStelian Pop * 162118ebb4SStelian Pop * This program is distributed in the hope that it will be useful, 172118ebb4SStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 182118ebb4SStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 192118ebb4SStelian Pop * GNU General Public License for more details. 202118ebb4SStelian Pop * 212118ebb4SStelian Pop * You should have received a copy of the GNU General Public License 222118ebb4SStelian Pop * along with this program; if not, write to the Free Software 232118ebb4SStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 242118ebb4SStelian Pop * MA 02111-1307 USA 252118ebb4SStelian Pop */ 262118ebb4SStelian Pop 272118ebb4SStelian Pop #ifndef __CONFIG_H 282118ebb4SStelian Pop #define __CONFIG_H 292118ebb4SStelian Pop 302118ebb4SStelian Pop /* ARM asynchronous clock */ 31761c70b8SStelian Pop #define AT91_CPU_NAME "AT91SAM9RL" 322118ebb4SStelian Pop #define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */ 332118ebb4SStelian Pop #define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */ 342118ebb4SStelian Pop #define CFG_HZ 1000000 /* 1us resolution */ 352118ebb4SStelian Pop 362118ebb4SStelian Pop #define AT91_SLOW_CLOCK 32768 /* slow clock */ 372118ebb4SStelian Pop 382118ebb4SStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 392118ebb4SStelian Pop #define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/ 402118ebb4SStelian Pop #define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */ 412118ebb4SStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 422118ebb4SStelian Pop 432118ebb4SStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 442118ebb4SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 452118ebb4SStelian Pop #define CONFIG_INITRD_TAG 1 462118ebb4SStelian Pop 472118ebb4SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 482118ebb4SStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 492118ebb4SStelian Pop 502118ebb4SStelian Pop /* 512118ebb4SStelian Pop * Hardware drivers 522118ebb4SStelian Pop */ 532118ebb4SStelian Pop #define CONFIG_ATMEL_USART 1 542118ebb4SStelian Pop #undef CONFIG_USART0 552118ebb4SStelian Pop #undef CONFIG_USART1 562118ebb4SStelian Pop #undef CONFIG_USART2 572118ebb4SStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 582118ebb4SStelian Pop 59761c70b8SStelian Pop /* LCD */ 60761c70b8SStelian Pop #define CONFIG_LCD 1 61761c70b8SStelian Pop #define LCD_BPP LCD_COLOR8 62761c70b8SStelian Pop #define CONFIG_LCD_LOGO 1 63761c70b8SStelian Pop #undef LCD_TEST_PATTERN 64761c70b8SStelian Pop #define CONFIG_LCD_INFO 1 65761c70b8SStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 66761c70b8SStelian Pop #define CFG_WHITE_ON_BLACK 1 67761c70b8SStelian Pop #define CONFIG_ATMEL_LCD 1 68761c70b8SStelian Pop #define CONFIG_ATMEL_LCD_RGB565 1 69761c70b8SStelian Pop #define CFG_CONSOLE_IS_IN_ENV 1 70761c70b8SStelian Pop 712118ebb4SStelian Pop #define CONFIG_BOOTDELAY 3 722118ebb4SStelian Pop 732118ebb4SStelian Pop /* 742118ebb4SStelian Pop * Command line configuration. 752118ebb4SStelian Pop */ 762118ebb4SStelian Pop #include <config_cmd_default.h> 772118ebb4SStelian Pop #undef CONFIG_CMD_BDI 782118ebb4SStelian Pop #undef CONFIG_CMD_IMI 792118ebb4SStelian Pop #undef CONFIG_CMD_AUTOSCRIPT 802118ebb4SStelian Pop #undef CONFIG_CMD_FPGA 812118ebb4SStelian Pop #undef CONFIG_CMD_LOADS 822118ebb4SStelian Pop #undef CONFIG_CMD_IMLS 832118ebb4SStelian Pop #undef CONFIG_CMD_NET 842118ebb4SStelian Pop #undef CONFIG_CMD_USB 852118ebb4SStelian Pop 862118ebb4SStelian Pop #define CONFIG_CMD_NAND 1 872118ebb4SStelian Pop 882118ebb4SStelian Pop /* SDRAM */ 892118ebb4SStelian Pop #define CONFIG_NR_DRAM_BANKS 1 902118ebb4SStelian Pop #define PHYS_SDRAM 0x20000000 912118ebb4SStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 922118ebb4SStelian Pop 932118ebb4SStelian Pop /* DataFlash */ 942118ebb4SStelian Pop #define CONFIG_HAS_DATAFLASH 1 952118ebb4SStelian Pop #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) 962118ebb4SStelian Pop #define CFG_MAX_DATAFLASH_BANKS 1 972118ebb4SStelian Pop #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 982118ebb4SStelian Pop #define AT91_SPI_CLK 15000000 992118ebb4SStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 1002118ebb4SStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1012118ebb4SStelian Pop 1022118ebb4SStelian Pop /* NOR flash - not present */ 1032118ebb4SStelian Pop #define CFG_NO_FLASH 1 1042118ebb4SStelian Pop 1052118ebb4SStelian Pop /* NAND flash */ 1062118ebb4SStelian Pop #define NAND_MAX_CHIPS 1 1072118ebb4SStelian Pop #define CFG_MAX_NAND_DEVICE 1 1082118ebb4SStelian Pop #define CFG_NAND_BASE 0x40000000 1092118ebb4SStelian Pop #define CFG_NAND_DBW_8 1 1102118ebb4SStelian Pop 1112118ebb4SStelian Pop /* Ethernet - not present */ 1122118ebb4SStelian Pop 1132118ebb4SStelian Pop /* USB - not supported */ 1142118ebb4SStelian Pop 1152118ebb4SStelian Pop #define CFG_LOAD_ADDR 0x22000000 /* load address */ 1162118ebb4SStelian Pop 1172118ebb4SStelian Pop #define CFG_MEMTEST_START PHYS_SDRAM 1182118ebb4SStelian Pop #define CFG_MEMTEST_END 0x23e00000 1192118ebb4SStelian Pop 1202118ebb4SStelian Pop #define CFG_USE_DATAFLASH 1 1212118ebb4SStelian Pop #undef CFG_USE_NANDFLASH 1222118ebb4SStelian Pop 1232118ebb4SStelian Pop #ifdef CFG_USE_DATAFLASH 1242118ebb4SStelian Pop 1252118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 126*057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1272118ebb4SStelian Pop #define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1282118ebb4SStelian Pop #define CFG_ENV_OFFSET 0x4200 1292118ebb4SStelian Pop #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) 1302118ebb4SStelian Pop #define CFG_ENV_SIZE 0x4200 1312118ebb4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 1322118ebb4SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1332118ebb4SStelian Pop "root=/dev/mtdblock0 " \ 1342118ebb4SStelian Pop "mtdparts=at91_nand:-(root) "\ 1352118ebb4SStelian Pop "rw rootfstype=jffs2" 1362118ebb4SStelian Pop 1372118ebb4SStelian Pop #else /* CFG_USE_NANDFLASH */ 1382118ebb4SStelian Pop 1392118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 1402118ebb4SStelian Pop #define CFG_ENV_IS_IN_NAND 1 1412118ebb4SStelian Pop #define CFG_ENV_OFFSET 0x60000 1422118ebb4SStelian Pop #define CFG_ENV_OFFSET_REDUND 0x80000 1432118ebb4SStelian Pop #define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1442118ebb4SStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 1452118ebb4SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1462118ebb4SStelian Pop "root=/dev/mtdblock5 " \ 1472118ebb4SStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ 1482118ebb4SStelian Pop "rw rootfstype=jffs2" 1492118ebb4SStelian Pop 1502118ebb4SStelian Pop #endif 1512118ebb4SStelian Pop 1522118ebb4SStelian Pop #define CONFIG_BAUDRATE 115200 1532118ebb4SStelian Pop #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 1542118ebb4SStelian Pop 1552118ebb4SStelian Pop #define CFG_PROMPT "U-Boot> " 1562118ebb4SStelian Pop #define CFG_CBSIZE 256 1572118ebb4SStelian Pop #define CFG_MAXARGS 16 1582118ebb4SStelian Pop #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) 1592118ebb4SStelian Pop #define CFG_LONGHELP 1 1602118ebb4SStelian Pop #define CONFIG_CMDLINE_EDITING 1 1612118ebb4SStelian Pop 1622118ebb4SStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 1632118ebb4SStelian Pop /* 1642118ebb4SStelian Pop * Size of malloc() pool 1652118ebb4SStelian Pop */ 1662118ebb4SStelian Pop #define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000) 1672118ebb4SStelian Pop #define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 1682118ebb4SStelian Pop 1692118ebb4SStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 1702118ebb4SStelian Pop 1712118ebb4SStelian Pop #ifdef CONFIG_USE_IRQ 1722118ebb4SStelian Pop #error CONFIG_USE_IRQ not supported 1732118ebb4SStelian Pop #endif 1742118ebb4SStelian Pop 1752118ebb4SStelian Pop #endif 176