xref: /rk3399_rockchip-uboot/include/configs/at91sam9rlek.h (revision 2cce6f5430c3ca3b2b9eafaed874ff104f26b660)
12118ebb4SStelian Pop /*
22118ebb4SStelian Pop  * (C) Copyright 2007-2008
3c9e798d3SStelian Pop  * Stelian Pop <stelian@popies.net>
42118ebb4SStelian Pop  * Lead Tech Design <www.leadtechdesign.com>
52118ebb4SStelian Pop  *
62118ebb4SStelian Pop  * Configuation settings for the AT91SAM9RLEK board.
72118ebb4SStelian Pop  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
92118ebb4SStelian Pop  */
102118ebb4SStelian Pop 
112118ebb4SStelian Pop #ifndef __CONFIG_H
122118ebb4SStelian Pop #define __CONFIG_H
132118ebb4SStelian Pop 
1421d671d0SXu, Hong #include <asm/hardware.h>
1521d671d0SXu, Hong 
1621d671d0SXu, Hong #define CONFIG_SYS_TEXT_BASE		0x21F00000
17425de62dSJens Scharsig 
182118ebb4SStelian Pop /* ARM asynchronous clock */
1921d671d0SXu, Hong #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
2021d671d0SXu, Hong #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* main clock xtal */
212118ebb4SStelian Pop 
2221d671d0SXu, Hong #define CONFIG_AT91SAM9RLEK		1	/* It's an AT91SAM9RLEK Board */
2321d671d0SXu, Hong 
24dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT
2521d671d0SXu, Hong #define CONFIG_SKIP_LOWLEVEL_INIT
262118ebb4SStelian Pop 
272118ebb4SStelian Pop #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
282118ebb4SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS	1
292118ebb4SStelian Pop #define CONFIG_INITRD_TAG		1
302118ebb4SStelian Pop 
3121d671d0SXu, Hong #define CONFIG_ATMEL_LEGACY
322118ebb4SStelian Pop 
332118ebb4SStelian Pop /*
342118ebb4SStelian Pop  * Hardware drivers
352118ebb4SStelian Pop  */
3621d671d0SXu, Hong 
37761c70b8SStelian Pop /* LCD */
38761c70b8SStelian Pop #define LCD_BPP				LCD_COLOR8
39761c70b8SStelian Pop #define CONFIG_LCD_LOGO			1
40761c70b8SStelian Pop #undef LCD_TEST_PATTERN
41761c70b8SStelian Pop #define CONFIG_LCD_INFO			1
42761c70b8SStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO	1
43761c70b8SStelian Pop #define CONFIG_ATMEL_LCD		1
44761c70b8SStelian Pop #define CONFIG_ATMEL_LCD_RGB565		1
4521d671d0SXu, Hong /* Let board_init_f handle the framebuffer allocation */
4621d671d0SXu, Hong #undef CONFIG_FB_ADDR
47761c70b8SStelian Pop 
482118ebb4SStelian Pop /* SDRAM */
492118ebb4SStelian Pop #define CONFIG_NR_DRAM_BANKS		1
5021d671d0SXu, Hong #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
5121d671d0SXu, Hong #define CONFIG_SYS_SDRAM_SIZE		0x04000000
5221d671d0SXu, Hong 
5321d671d0SXu, Hong #define CONFIG_SYS_INIT_SP_ADDR \
542011dca2SWenyou Yang 	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
552118ebb4SStelian Pop 
562118ebb4SStelian Pop /* NAND flash */
5774c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND
586d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE		1
5921d671d0SXu, Hong #define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8			1
6174c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */
6274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
6374c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */
6474c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
6574c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PB6
6674c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PD17
672eb99ca8SWolfgang Denk 
6874c076d6SJean-Christophe PLAGNIOL-VILLARD #endif
692118ebb4SStelian Pop 
702118ebb4SStelian Pop /* Ethernet - not present */
712118ebb4SStelian Pop 
722118ebb4SStelian Pop /* USB - not supported */
732118ebb4SStelian Pop 
746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
752118ebb4SStelian Pop 
7621d671d0SXu, Hong #define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END			0x23e00000
782118ebb4SStelian Pop 
796d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH
802118ebb4SStelian Pop 
812118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */
820e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET	0x4200
830e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x4200
84*56a61e5eSWenyou.Yang@microchip.com #define CONFIG_ENV_SECT_SIZE	0x210
85*56a61e5eSWenyou.Yang@microchip.com #define CONFIG_ENV_SPI_MAX_HZ	15000000
86*56a61e5eSWenyou.Yang@microchip.com #define CONFIG_BOOTCOMMAND	"sf probe 0; " \
87*56a61e5eSWenyou.Yang@microchip.com 				"sf read 0x22000000 0x84000 0x294000; " \
88*56a61e5eSWenyou.Yang@microchip.com 				"bootm 0x22000000"
892118ebb4SStelian Pop 
900b128434SWu, Josh #elif CONFIG_SYS_USE_NANDFLASH
912118ebb4SStelian Pop 
922118ebb4SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */
932011dca2SWenyou Yang #define CONFIG_ENV_OFFSET		0x120000
9465b553b7SWu, Josh #define CONFIG_ENV_OFFSET_REDUND	0x100000
950e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
9665b553b7SWu, Josh #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x600000; "	\
9765b553b7SWu, Josh 				"nand read 0x21000000 0x180000 0x80000; "	\
9865b553b7SWu, Josh 				"bootz 0x22000000 - 0x21000000"
992118ebb4SStelian Pop 
1000b128434SWu, Josh #else /* CONFIG_SYS_USE_MMC */
1010b128434SWu, Josh 
1020b128434SWu, Josh /* bootstrap + u-boot + env + linux in mmc */
1030b128434SWu, Josh #define CONFIG_ENV_SIZE		0x4000
1040b128434SWu, Josh #define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
1050b128434SWu, Josh 				"fatload mmc 0:1 0x22000000 zImage; " \
1060b128434SWu, Josh 				"bootz 0x22000000 - 0x21000000"
1072118ebb4SStelian Pop #endif
1082118ebb4SStelian Pop 
1096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP		1
1102118ebb4SStelian Pop #define CONFIG_CMDLINE_EDITING		1
111e139cb31SAlexandre Belloni #define CONFIG_AUTO_COMPLETE
1122118ebb4SStelian Pop 
1132118ebb4SStelian Pop /*
1142118ebb4SStelian Pop  * Size of malloc() pool
1152118ebb4SStelian Pop  */
1166d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
1172118ebb4SStelian Pop 
1182118ebb4SStelian Pop #endif
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