1 /* 2 * (C) Copyright 2013 Atmel Corporation. 3 * Josh Wu <josh.wu@atmel.com> 4 * 5 * Configuation settings for the AT91SAM9N12-EK boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AT91SAM9N12_CONFIG_H_ 11 #define __AT91SAM9N12_CONFIG_H_ 12 13 /* 14 * SoC must be defined first, before hardware.h is included. 15 * In this case SoC is defined in boards.cfg. 16 */ 17 #include <asm/hardware.h> 18 19 #define CONFIG_SYS_TEXT_BASE 0x26f00000 20 21 /* ARM asynchronous clock */ 22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 23 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ 24 25 /* Misc CPU related */ 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 #define CONFIG_SKIP_LOWLEVEL_INIT 30 31 /* LCD */ 32 #define LCD_BPP LCD_COLOR16 33 #define LCD_OUTPUT_BPP 24 34 #define CONFIG_LCD_LOGO 35 #define CONFIG_LCD_INFO 36 #define CONFIG_LCD_INFO_BELOW_LOGO 37 #define CONFIG_ATMEL_HLCD 38 #define CONFIG_ATMEL_LCD_RGB565 39 40 /* 41 * BOOTP options 42 */ 43 #define CONFIG_BOOTP_BOOTFILESIZE 44 #define CONFIG_BOOTP_BOOTPATH 45 #define CONFIG_BOOTP_GATEWAY 46 #define CONFIG_BOOTP_HOSTNAME 47 48 #define CONFIG_NR_DRAM_BANKS 1 49 #define CONFIG_SYS_SDRAM_BASE 0x20000000 50 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 51 52 /* 53 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 54 * leaving the correct space for initial global data structure above 55 * that address while providing maximum stack area below. 56 */ 57 # define CONFIG_SYS_INIT_SP_ADDR \ 58 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 59 60 /* DataFlash */ 61 #ifdef CONFIG_CMD_SF 62 #define CONFIG_SF_DEFAULT_SPEED 30000000 63 #endif 64 65 /* NAND flash */ 66 #ifdef CONFIG_CMD_NAND 67 #define CONFIG_SYS_MAX_NAND_DEVICE 1 68 #define CONFIG_SYS_NAND_BASE 0x40000000 69 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 70 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 71 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) 72 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) 73 #endif 74 75 /* PMECC & PMERRLOC */ 76 #define CONFIG_ATMEL_NAND_HWECC 77 #define CONFIG_ATMEL_NAND_HW_PMECC 78 #define CONFIG_PMECC_CAP 2 79 #define CONFIG_PMECC_SECTOR_SIZE 512 80 #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 81 82 #define CONFIG_MTD_PARTITIONS 83 #define CONFIG_MTD_DEVICE 84 #define MTDIDS_DEFAULT "nand0=atmel_nand" 85 #define MTDPARTS_DEFAULT \ 86 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 87 "256k(env),256k(env_redundant),256k(spare)," \ 88 "512k(dtb),6M(kernel)ro,-(rootfs)" 89 90 #define CONFIG_EXTRA_ENV_SETTINGS \ 91 "console=console=ttyS0,115200\0" \ 92 "mtdparts="MTDPARTS_DEFAULT"\0" \ 93 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ 94 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" 95 96 /* Ethernet */ 97 #define CONFIG_KS8851_MLL 98 #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */ 99 100 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 101 102 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 103 #define CONFIG_SYS_MEMTEST_END 0x26e00000 104 105 /* USB host */ 106 #ifdef CONFIG_CMD_USB 107 #define CONFIG_USB_ATMEL 108 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 109 #define CONFIG_USB_OHCI_NEW 110 #define CONFIG_SYS_USB_OHCI_CPU_INIT 111 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 112 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" 113 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 114 #endif 115 116 #ifdef CONFIG_SYS_USE_SPIFLASH 117 118 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 119 #define CONFIG_ENV_OFFSET 0x5000 120 #define CONFIG_ENV_SIZE 0x3000 121 #define CONFIG_ENV_SECT_SIZE 0x1000 122 #define CONFIG_BOOTCOMMAND \ 123 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 124 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ 125 "bootm 0x22000000" 126 127 #elif defined(CONFIG_SYS_USE_NANDFLASH) 128 129 /* bootstrap + u-boot + env + linux in nandflash */ 130 #define CONFIG_ENV_OFFSET 0x120000 131 #define CONFIG_ENV_OFFSET_REDUND 0x100000 132 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 133 #define CONFIG_BOOTCOMMAND \ 134 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 135 "nand read 0x21000000 0x180000 0x080000;" \ 136 "nand read 0x22000000 0x200000 0x400000;" \ 137 "bootm 0x22000000 - 0x21000000" 138 139 #else /* CONFIG_SYS_USE_MMC */ 140 141 /* bootstrap + u-boot + env + linux in mmc */ 142 143 #ifdef CONFIG_ENV_IS_IN_MMC 144 /* Use raw reserved sectors to save environment */ 145 #define CONFIG_ENV_OFFSET 0x2000 146 #define CONFIG_ENV_SIZE 0x1000 147 #define CONFIG_SYS_MMC_ENV_DEV 0 148 #else 149 /* Use file in FAT file to save environment */ 150 #define CONFIG_ENV_SIZE 0x4000 151 #endif 152 153 #define CONFIG_BOOTCOMMAND \ 154 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ 155 "fatload mmc 0:1 0x21000000 dtb;" \ 156 "fatload mmc 0:1 0x22000000 uImage;" \ 157 "bootm 0x22000000 - 0x21000000" 158 159 #endif 160 161 #define CONFIG_SYS_LONGHELP 162 #define CONFIG_CMDLINE_EDITING 163 #define CONFIG_AUTO_COMPLETE 164 165 /* 166 * Size of malloc() pool 167 */ 168 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 169 170 /* SPL */ 171 #define CONFIG_SPL_FRAMEWORK 172 #define CONFIG_SPL_TEXT_BASE 0x300000 173 #define CONFIG_SPL_MAX_SIZE 0x6000 174 #define CONFIG_SPL_STACK 0x308000 175 176 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 177 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 178 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 179 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 180 181 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 182 183 #define CONFIG_SYS_MASTER_CLOCK 132096000 184 #define CONFIG_SYS_AT91_PLLA 0x20953f03 185 #define CONFIG_SYS_MCKR 0x1301 186 #define CONFIG_SYS_MCKR_CSS 0x1302 187 188 #ifdef CONFIG_SYS_USE_MMC 189 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 190 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 191 192 #elif CONFIG_SYS_USE_NANDFLASH 193 #define CONFIG_SPL_NAND_DRIVERS 194 #define CONFIG_SPL_NAND_BASE 195 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 196 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 197 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 198 #define CONFIG_SYS_NAND_PAGE_COUNT 64 199 #define CONFIG_SYS_NAND_OOBSIZE 64 200 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 201 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 202 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 203 204 #elif CONFIG_SYS_USE_SPIFLASH 205 #define CONFIG_SPL_SPI_LOAD 206 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 207 208 #endif 209 210 #endif 211