122ee6473SSedji Gaouaou /* 222ee6473SSedji Gaouaou * (C) Copyright 2007-2008 3c9e798d3SStelian Pop * Stelian Pop <stelian@popies.net> 422ee6473SSedji Gaouaou * Lead Tech Design <www.leadtechdesign.com> 522ee6473SSedji Gaouaou * 622ee6473SSedji Gaouaou * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). 722ee6473SSedji Gaouaou * 81a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 922ee6473SSedji Gaouaou */ 1022ee6473SSedji Gaouaou 1122ee6473SSedji Gaouaou #ifndef __CONFIG_H 1222ee6473SSedji Gaouaou #define __CONFIG_H 1322ee6473SSedji Gaouaou 145cfeec51SThomas Petazzoni #include <asm/hardware.h> 155cfeec51SThomas Petazzoni 1677461a65SBo Shen #define CONFIG_SYS_TEXT_BASE 0x73f00000 1777461a65SBo Shen 185cfeec51SThomas Petazzoni #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 19425de62dSJens Scharsig 2022ee6473SSedji Gaouaou /* ARM asynchronous clock */ 215cfeec51SThomas Petazzoni #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 227c966a8bSAchim Ehrlich #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 2322ee6473SSedji Gaouaou 245cfeec51SThomas Petazzoni #define CONFIG_AT91SAM9M10G45EK 2522ee6473SSedji Gaouaou 265cfeec51SThomas Petazzoni #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 275cfeec51SThomas Petazzoni #define CONFIG_SETUP_MEMORY_TAGS 285cfeec51SThomas Petazzoni #define CONFIG_INITRD_TAG 2922ee6473SSedji Gaouaou #define CONFIG_SKIP_LOWLEVEL_INIT 305cfeec51SThomas Petazzoni #define CONFIG_BOARD_EARLY_INIT_F 315cfeec51SThomas Petazzoni #define CONFIG_DISPLAY_CPUINFO 325cfeec51SThomas Petazzoni 33f9129fe3SNicolas Ferre #define CONFIG_CMD_BOOTZ 34dc3e30baSBo Shen #define CONFIG_OF_LIBFDT 35dc3e30baSBo Shen 3668f16477SBo Shen #define CONFIG_SYS_GENERIC_BOARD 3768f16477SBo Shen 385cfeec51SThomas Petazzoni /* general purpose I/O */ 395cfeec51SThomas Petazzoni #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 405cfeec51SThomas Petazzoni #define CONFIG_AT91_GPIO 415cfeec51SThomas Petazzoni #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 425cfeec51SThomas Petazzoni 435cfeec51SThomas Petazzoni /* serial console */ 445cfeec51SThomas Petazzoni #define CONFIG_ATMEL_USART 455cfeec51SThomas Petazzoni #define CONFIG_USART_BASE ATMEL_BASE_DBGU 465cfeec51SThomas Petazzoni #define CONFIG_USART_ID ATMEL_ID_SYS 4722ee6473SSedji Gaouaou 4822ee6473SSedji Gaouaou /* LCD */ 495cfeec51SThomas Petazzoni #define CONFIG_LCD 5022ee6473SSedji Gaouaou #define LCD_BPP LCD_COLOR8 515cfeec51SThomas Petazzoni #define CONFIG_LCD_LOGO 5222ee6473SSedji Gaouaou #undef LCD_TEST_PATTERN 535cfeec51SThomas Petazzoni #define CONFIG_LCD_INFO 545cfeec51SThomas Petazzoni #define CONFIG_LCD_INFO_BELOW_LOGO 555cfeec51SThomas Petazzoni #define CONFIG_SYS_WHITE_ON_BLACK 565cfeec51SThomas Petazzoni #define CONFIG_ATMEL_LCD 575cfeec51SThomas Petazzoni #define CONFIG_ATMEL_LCD_RGB565 585cfeec51SThomas Petazzoni #define CONFIG_SYS_CONSOLE_IS_IN_ENV 5922ee6473SSedji Gaouaou /* board specific(not enough SRAM) */ 6022ee6473SSedji Gaouaou #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 6122ee6473SSedji Gaouaou 6222ee6473SSedji Gaouaou /* LED */ 6322ee6473SSedji Gaouaou #define CONFIG_AT91_LED 6422ee6473SSedji Gaouaou #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ 6522ee6473SSedji Gaouaou #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ 6622ee6473SSedji Gaouaou 6722ee6473SSedji Gaouaou #define CONFIG_BOOTDELAY 3 6822ee6473SSedji Gaouaou 6922ee6473SSedji Gaouaou /* 7022ee6473SSedji Gaouaou * BOOTP options 7122ee6473SSedji Gaouaou */ 725cfeec51SThomas Petazzoni #define CONFIG_BOOTP_BOOTFILESIZE 735cfeec51SThomas Petazzoni #define CONFIG_BOOTP_BOOTPATH 745cfeec51SThomas Petazzoni #define CONFIG_BOOTP_GATEWAY 755cfeec51SThomas Petazzoni #define CONFIG_BOOTP_HOSTNAME 7622ee6473SSedji Gaouaou 7722ee6473SSedji Gaouaou /* 7822ee6473SSedji Gaouaou * Command line configuration. 7922ee6473SSedji Gaouaou */ 80782358fbSBo Shen 81782358fbSBo Shen /* No NOR flash */ 82782358fbSBo Shen #define CONFIG_SYS_NO_FLASH 83782358fbSBo Shen 8422ee6473SSedji Gaouaou #include <config_cmd_default.h> 8522ee6473SSedji Gaouaou #undef CONFIG_CMD_BDI 8622ee6473SSedji Gaouaou #undef CONFIG_CMD_FPGA 8722ee6473SSedji Gaouaou #undef CONFIG_CMD_IMI 8822ee6473SSedji Gaouaou #undef CONFIG_CMD_IMLS 8922ee6473SSedji Gaouaou #undef CONFIG_CMD_LOADS 9022ee6473SSedji Gaouaou 915cfeec51SThomas Petazzoni #define CONFIG_CMD_PING 925cfeec51SThomas Petazzoni #define CONFIG_CMD_DHCP 935cfeec51SThomas Petazzoni #define CONFIG_CMD_NAND 945cfeec51SThomas Petazzoni #define CONFIG_CMD_USB 9522ee6473SSedji Gaouaou 9622ee6473SSedji Gaouaou /* SDRAM */ 9722ee6473SSedji Gaouaou #define CONFIG_NR_DRAM_BANKS 1 985cfeec51SThomas Petazzoni #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 995cfeec51SThomas Petazzoni #define CONFIG_SYS_SDRAM_SIZE 0x08000000 10022ee6473SSedji Gaouaou 1015cfeec51SThomas Petazzoni #define CONFIG_SYS_INIT_SP_ADDR \ 1025cfeec51SThomas Petazzoni (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 10322ee6473SSedji Gaouaou 10422ee6473SSedji Gaouaou /* NAND flash */ 10522ee6473SSedji Gaouaou #ifdef CONFIG_CMD_NAND 10622ee6473SSedji Gaouaou #define CONFIG_NAND_ATMEL 10722ee6473SSedji Gaouaou #define CONFIG_SYS_MAX_NAND_DEVICE 1 1085cfeec51SThomas Petazzoni #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 1095cfeec51SThomas Petazzoni #define CONFIG_SYS_NAND_DBW_8 11022ee6473SSedji Gaouaou /* our ALE is AD21 */ 11122ee6473SSedji Gaouaou #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 11222ee6473SSedji Gaouaou /* our CLE is AD22 */ 11322ee6473SSedji Gaouaou #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 11422ee6473SSedji Gaouaou #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 11522ee6473SSedji Gaouaou #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 1162eb99ca8SWolfgang Denk 11722ee6473SSedji Gaouaou #endif 11822ee6473SSedji Gaouaou 119cf874c19SWu, Josh /* MMC */ 120cf874c19SWu, Josh #define CONFIG_CMD_MMC 121cf874c19SWu, Josh 122cf874c19SWu, Josh #ifdef CONFIG_CMD_MMC 123cf874c19SWu, Josh #define CONFIG_MMC 124cf874c19SWu, Josh #define CONFIG_GENERIC_MMC 125cf874c19SWu, Josh #define CONFIG_GENERIC_ATMEL_MCI 126cf874c19SWu, Josh #endif 127cf874c19SWu, Josh 128cf874c19SWu, Josh #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 129cf874c19SWu, Josh #define CONFIG_CMD_FAT 130cf874c19SWu, Josh #define CONFIG_DOS_PARTITION 131cf874c19SWu, Josh #endif 132cf874c19SWu, Josh 13322ee6473SSedji Gaouaou /* Ethernet */ 1345cfeec51SThomas Petazzoni #define CONFIG_MACB 1355cfeec51SThomas Petazzoni #define CONFIG_RMII 13622ee6473SSedji Gaouaou #define CONFIG_NET_RETRY_COUNT 20 1375cfeec51SThomas Petazzoni #define CONFIG_RESET_PHY_R 1384535a24cSHeiko Schocher #define CONFIG_AT91_WANTS_COMMON_PHY 13922ee6473SSedji Gaouaou 14022ee6473SSedji Gaouaou /* USB */ 141e1edd065SBo Shen #define CONFIG_USB_EHCI 142e1edd065SBo Shen #define CONFIG_USB_EHCI_ATMEL 143e1edd065SBo Shen #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 1445cfeec51SThomas Petazzoni #define CONFIG_USB_STORAGE 14522ee6473SSedji Gaouaou 14622ee6473SSedji Gaouaou #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 14722ee6473SSedji Gaouaou 1485cfeec51SThomas Petazzoni #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 14922ee6473SSedji Gaouaou #define CONFIG_SYS_MEMTEST_END 0x23e00000 15022ee6473SSedji Gaouaou 1519637a1bbSWu, Josh #ifdef CONFIG_SYS_USE_NANDFLASH 1525cfeec51SThomas Petazzoni /* bootstrap + u-boot + env in nandflash */ 1535cfeec51SThomas Petazzoni #define CONFIG_ENV_IS_IN_NAND 1540c58cfa9SBo Shen #define CONFIG_ENV_OFFSET 0xc0000 1550c58cfa9SBo Shen #define CONFIG_ENV_OFFSET_REDUND 0x100000 1565cfeec51SThomas Petazzoni #define CONFIG_ENV_SIZE 0x20000 15722ee6473SSedji Gaouaou 1580c58cfa9SBo Shen #define CONFIG_BOOTCOMMAND \ 1590c58cfa9SBo Shen "nand read 0x70000000 0x200000 0x300000;" \ 1605cfeec51SThomas Petazzoni "bootm 0x70000000" 1615cfeec51SThomas Petazzoni #define CONFIG_BOOTARGS \ 1625cfeec51SThomas Petazzoni "console=ttyS0,115200 earlyprintk " \ 1630c58cfa9SBo Shen "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 1640c58cfa9SBo Shen "256k(env),256k(env_redundant),256k(spare)," \ 1650c58cfa9SBo Shen "512k(dtb),6M(kernel)ro,-(rootfs) " \ 1660c58cfa9SBo Shen "root=/dev/mtdblock7 rw rootfstype=jffs2" 1679637a1bbSWu, Josh #elif CONFIG_SYS_USE_MMC 1689637a1bbSWu, Josh /* bootstrap + u-boot + env + linux in mmc */ 1699637a1bbSWu, Josh #define FAT_ENV_INTERFACE "mmc" 170be354c1aSWu, Josh /* 171be354c1aSWu, Josh * We don't specify the part number, if device 0 has partition table, it means 172be354c1aSWu, Josh * the first partition; it no partition table, then take whole device as a 173be354c1aSWu, Josh * FAT file system. 174be354c1aSWu, Josh */ 175be354c1aSWu, Josh #define FAT_ENV_DEVICE_AND_PART "0" 1769637a1bbSWu, Josh #define FAT_ENV_FILE "uboot.env" 1779637a1bbSWu, Josh #define CONFIG_ENV_IS_IN_FAT 1789637a1bbSWu, Josh #define CONFIG_FAT_WRITE 1799637a1bbSWu, Josh #define CONFIG_ENV_SIZE 0x4000 1809637a1bbSWu, Josh 1819637a1bbSWu, Josh #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1829637a1bbSWu, Josh "mtdparts=atmel_nand:" \ 1839637a1bbSWu, Josh "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ 1849637a1bbSWu, Josh "root=/dev/mmcblk0p2 rw rootwait" 1859637a1bbSWu, Josh #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \ 1869637a1bbSWu, Josh "fatload mmc 0:1 0x72000000 zImage; " \ 1879637a1bbSWu, Josh "bootz 0x72000000 - 0x71000000" 1889637a1bbSWu, Josh #endif 18922ee6473SSedji Gaouaou 19022ee6473SSedji Gaouaou #define CONFIG_BAUDRATE 115200 19122ee6473SSedji Gaouaou 19222ee6473SSedji Gaouaou #define CONFIG_SYS_PROMPT "U-Boot> " 19322ee6473SSedji Gaouaou #define CONFIG_SYS_CBSIZE 256 19422ee6473SSedji Gaouaou #define CONFIG_SYS_MAXARGS 16 19522ee6473SSedji Gaouaou #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 1965cfeec51SThomas Petazzoni #define CONFIG_SYS_LONGHELP 1975cfeec51SThomas Petazzoni #define CONFIG_CMDLINE_EDITING 19822ee6473SSedji Gaouaou #define CONFIG_AUTO_COMPLETE 19922ee6473SSedji Gaouaou #define CONFIG_SYS_HUSH_PARSER 20022ee6473SSedji Gaouaou 20122ee6473SSedji Gaouaou /* 20222ee6473SSedji Gaouaou * Size of malloc() pool 20322ee6473SSedji Gaouaou */ 20422ee6473SSedji Gaouaou #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 20522ee6473SSedji Gaouaou 206*41d41a93SBo Shen /* Defines for SPL */ 207*41d41a93SBo Shen #define CONFIG_SPL_FRAMEWORK 208*41d41a93SBo Shen #define CONFIG_SPL_TEXT_BASE 0x300000 209*41d41a93SBo Shen #define CONFIG_SPL_MAX_SIZE 0x010000 210*41d41a93SBo Shen #define CONFIG_SPL_STACK 0x310000 211*41d41a93SBo Shen 212*41d41a93SBo Shen #define CONFIG_SPL_LIBCOMMON_SUPPORT 213*41d41a93SBo Shen #define CONFIG_SPL_LIBGENERIC_SUPPORT 214*41d41a93SBo Shen #define CONFIG_SPL_SERIAL_SUPPORT 215*41d41a93SBo Shen #define CONFIG_SPL_GPIO_SUPPORT 216*41d41a93SBo Shen 217*41d41a93SBo Shen #define CONFIG_SYS_MONITOR_LEN 0x80000 218*41d41a93SBo Shen 219*41d41a93SBo Shen #ifdef CONFIG_SYS_USE_MMC 220*41d41a93SBo Shen 221*41d41a93SBo Shen #define CONFIG_SPL_BSS_START_ADDR 0x70000000 222*41d41a93SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 223*41d41a93SBo Shen #define CONFIG_SYS_SPL_MALLOC_START 0x70080000 224*41d41a93SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 225*41d41a93SBo Shen 226*41d41a93SBo Shen #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds 227*41d41a93SBo Shen #define CONFIG_SPL_MMC_SUPPORT 228*41d41a93SBo Shen #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 229*41d41a93SBo Shen #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 230*41d41a93SBo Shen #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 231*41d41a93SBo Shen #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 232*41d41a93SBo Shen #define CONFIG_SPL_FAT_SUPPORT 233*41d41a93SBo Shen #define CONFIG_SPL_LIBDISK_SUPPORT 234*41d41a93SBo Shen 235*41d41a93SBo Shen #elif CONFIG_SYS_USE_NANDFLASH 236*41d41a93SBo Shen #define CONFIG_SPL_NAND_SUPPORT 237*41d41a93SBo Shen #define CONFIG_SPL_NAND_DRIVERS 238*41d41a93SBo Shen #define CONFIG_SPL_NAND_BASE 239*41d41a93SBo Shen #define CONFIG_SPL_NAND_ECC 240*41d41a93SBo Shen #define CONFIG_SPL_NAND_SOFTECC 241*41d41a93SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 242*41d41a93SBo Shen #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 243*41d41a93SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE 244*41d41a93SBo Shen 245*41d41a93SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 246*41d41a93SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 247*41d41a93SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT 64 248*41d41a93SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 249*41d41a93SBo Shen #define CONFIG_SYS_NAND_ECCSIZE 256 250*41d41a93SBo Shen #define CONFIG_SYS_NAND_ECCBYTES 3 251*41d41a93SBo Shen #define CONFIG_SYS_NAND_OOBSIZE 64 252*41d41a93SBo Shen #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 253*41d41a93SBo Shen 48, 49, 50, 51, 52, 53, 54, 55, \ 254*41d41a93SBo Shen 56, 57, 58, 59, 60, 61, 62, 63, } 255*41d41a93SBo Shen #endif 256*41d41a93SBo Shen 257*41d41a93SBo Shen #define CONFIG_SPL_ATMEL_SIZE 258*41d41a93SBo Shen #define CONFIG_SYS_MASTER_CLOCK 132096000 259*41d41a93SBo Shen #define CONFIG_SYS_AT91_PLLA 0x20c73f03 260*41d41a93SBo Shen #define CONFIG_SYS_MCKR 0x1301 261*41d41a93SBo Shen #define CONFIG_SYS_MCKR_CSS 0x1302 262*41d41a93SBo Shen 263*41d41a93SBo Shen #define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC0 26422ee6473SSedji Gaouaou #endif 265