18e429b3eSStelian Pop /* 28e429b3eSStelian Pop * (C) Copyright 2007-2008 38e429b3eSStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 48e429b3eSStelian Pop * Lead Tech Design <www.leadtechdesign.com> 58e429b3eSStelian Pop * 68e429b3eSStelian Pop * Configuation settings for the AT91SAM9263EK board. 78e429b3eSStelian Pop * 88e429b3eSStelian Pop * See file CREDITS for list of people who contributed to this 98e429b3eSStelian Pop * project. 108e429b3eSStelian Pop * 118e429b3eSStelian Pop * This program is free software; you can redistribute it and/or 128e429b3eSStelian Pop * modify it under the terms of the GNU General Public License as 138e429b3eSStelian Pop * published by the Free Software Foundation; either version 2 of 148e429b3eSStelian Pop * the License, or (at your option) any later version. 158e429b3eSStelian Pop * 168e429b3eSStelian Pop * This program is distributed in the hope that it will be useful, 178e429b3eSStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 188e429b3eSStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 198e429b3eSStelian Pop * GNU General Public License for more details. 208e429b3eSStelian Pop * 218e429b3eSStelian Pop * You should have received a copy of the GNU General Public License 228e429b3eSStelian Pop * along with this program; if not, write to the Free Software 238e429b3eSStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 248e429b3eSStelian Pop * MA 02111-1307 USA 258e429b3eSStelian Pop */ 268e429b3eSStelian Pop 278e429b3eSStelian Pop #ifndef __CONFIG_H 288e429b3eSStelian Pop #define __CONFIG_H 298e429b3eSStelian Pop 308e429b3eSStelian Pop /* ARM asynchronous clock */ 3156a2479cSStelian Pop #define AT91_CPU_NAME "AT91SAM9263" 32ad229a44SStelian Pop #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ 336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ 348e429b3eSStelian Pop 358e429b3eSStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 368e429b3eSStelian Pop #define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/ 378e429b3eSStelian Pop #define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */ 38*dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT 398e429b3eSStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 408e429b3eSStelian Pop 418e429b3eSStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 428e429b3eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 438e429b3eSStelian Pop #define CONFIG_INITRD_TAG 1 448e429b3eSStelian Pop 458e429b3eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 468e429b3eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 478e429b3eSStelian Pop 488e429b3eSStelian Pop /* 498e429b3eSStelian Pop * Hardware drivers 508e429b3eSStelian Pop */ 518e429b3eSStelian Pop #define CONFIG_ATMEL_USART 1 528e429b3eSStelian Pop #undef CONFIG_USART0 538e429b3eSStelian Pop #undef CONFIG_USART1 548e429b3eSStelian Pop #undef CONFIG_USART2 558e429b3eSStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 568e429b3eSStelian Pop 5756a2479cSStelian Pop /* LCD */ 5856a2479cSStelian Pop #define CONFIG_LCD 1 5956a2479cSStelian Pop #define LCD_BPP LCD_COLOR8 6056a2479cSStelian Pop #define CONFIG_LCD_LOGO 1 6156a2479cSStelian Pop #undef LCD_TEST_PATTERN 6256a2479cSStelian Pop #define CONFIG_LCD_INFO 1 6356a2479cSStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_WHITE_ON_BLACK 1 6556a2479cSStelian Pop #define CONFIG_ATMEL_LCD 1 6656a2479cSStelian Pop #define CONFIG_ATMEL_LCD_BGR555 1 676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 6856a2479cSStelian Pop 69a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 70a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 71a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */ 72a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */ 73a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */ 74a484b00bSJean-Christophe PLAGNIOL-VILLARD 758e429b3eSStelian Pop #define CONFIG_BOOTDELAY 3 768e429b3eSStelian Pop 778e429b3eSStelian Pop /* 788e429b3eSStelian Pop * BOOTP options 798e429b3eSStelian Pop */ 808e429b3eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 818e429b3eSStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 828e429b3eSStelian Pop #define CONFIG_BOOTP_GATEWAY 1 838e429b3eSStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 848e429b3eSStelian Pop 858e429b3eSStelian Pop /* 868e429b3eSStelian Pop * Command line configuration. 878e429b3eSStelian Pop */ 888e429b3eSStelian Pop #include <config_cmd_default.h> 898e429b3eSStelian Pop #undef CONFIG_CMD_BDI 908e429b3eSStelian Pop #undef CONFIG_CMD_FPGA 9174de7aefSWolfgang Denk #undef CONFIG_CMD_IMI 928e429b3eSStelian Pop #undef CONFIG_CMD_IMLS 9374de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS 9474de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE 958e429b3eSStelian Pop 968e429b3eSStelian Pop #define CONFIG_CMD_PING 1 978e429b3eSStelian Pop #define CONFIG_CMD_DHCP 1 988e429b3eSStelian Pop #define CONFIG_CMD_NAND 1 998e429b3eSStelian Pop #define CONFIG_CMD_USB 1 1008e429b3eSStelian Pop 1018e429b3eSStelian Pop /* SDRAM */ 1028e429b3eSStelian Pop #define CONFIG_NR_DRAM_BANKS 1 1038e429b3eSStelian Pop #define PHYS_SDRAM 0x20000000 1048e429b3eSStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 1058e429b3eSStelian Pop 1068e429b3eSStelian Pop /* DataFlash */ 1074758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI 1088e429b3eSStelian Pop #define CONFIG_HAS_DATAFLASH 1 1096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1128e429b3eSStelian Pop #define AT91_SPI_CLK 15000000 1138e429b3eSStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 1148e429b3eSStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1158e429b3eSStelian Pop 1168e429b3eSStelian Pop /* NOR flash, if populated */ 1178e429b3eSStelian Pop #if 1 1186d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 1198e429b3eSStelian Pop #else 1206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI 1 12100b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER 1 1228e429b3eSStelian Pop #define PHYS_FLASH_1 0x10000000 1236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT 256 1256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS 1 1268e429b3eSStelian Pop #endif 1278e429b3eSStelian Pop 1288e429b3eSStelian Pop /* NAND flash */ 12974c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 13074c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 1316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 13474c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */ 13574c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 13674c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */ 13774c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 13874c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 13974c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 14074c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 1418e429b3eSStelian Pop 1428e429b3eSStelian Pop /* Ethernet */ 1438e429b3eSStelian Pop #define CONFIG_MACB 1 1448e429b3eSStelian Pop #define CONFIG_RMII 1 1458e429b3eSStelian Pop #define CONFIG_NET_MULTI 1 1468e429b3eSStelian Pop #define CONFIG_NET_RETRY_COUNT 20 1478e429b3eSStelian Pop #define CONFIG_RESET_PHY_R 1 1488e429b3eSStelian Pop 1498e429b3eSStelian Pop /* USB */ 1502b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL 1518e429b3eSStelian Pop #define CONFIG_USB_OHCI_NEW 1 1528e429b3eSStelian Pop #define CONFIG_DOS_PARTITION 1 1536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 1546d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ 1556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" 1566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1578e429b3eSStelian Pop #define CONFIG_USB_STORAGE 1 1583e0cda07SStelian Pop #define CONFIG_CMD_FAT 1 1598e429b3eSStelian Pop 1606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1618e429b3eSStelian Pop 1626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 1648e429b3eSStelian Pop 1656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH 1668e429b3eSStelian Pop 1678e429b3eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 168057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1700e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1720e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 1738e429b3eSStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 1748e429b3eSStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1758e429b3eSStelian Pop "root=/dev/mtdblock0 " \ 1768e429b3eSStelian Pop "mtdparts=at91_nand:-(root) "\ 1778e429b3eSStelian Pop "rw rootfstype=jffs2" 1788e429b3eSStelian Pop 1796d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 1808e429b3eSStelian Pop 1818e429b3eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 18251bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 1830e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 1840e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 1850e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1868e429b3eSStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 1878e429b3eSStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1888e429b3eSStelian Pop "root=/dev/mtdblock5 " \ 1898e429b3eSStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ 1908e429b3eSStelian Pop "rw rootfstype=jffs2" 1918e429b3eSStelian Pop 1928e429b3eSStelian Pop #endif 1938e429b3eSStelian Pop 1948e429b3eSStelian Pop #define CONFIG_BAUDRATE 115200 1956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 1968e429b3eSStelian Pop 1976d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 1986d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 1996d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 2006d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 2016d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 2028e429b3eSStelian Pop #define CONFIG_CMDLINE_EDITING 1 20303bab009SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AUTO_COMPLETE 20403bab009SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HUSH_PARSER 20503bab009SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 2068e429b3eSStelian Pop 2078e429b3eSStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 2088e429b3eSStelian Pop /* 2098e429b3eSStelian Pop * Size of malloc() pool 2108e429b3eSStelian Pop */ 2116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 2126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 2138e429b3eSStelian Pop 2148e429b3eSStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 2158e429b3eSStelian Pop 2168e429b3eSStelian Pop #ifdef CONFIG_USE_IRQ 2178e429b3eSStelian Pop #error CONFIG_USE_IRQ not supported 2188e429b3eSStelian Pop #endif 2198e429b3eSStelian Pop 2208e429b3eSStelian Pop #endif 221