18e429b3eSStelian Pop /* 28e429b3eSStelian Pop * (C) Copyright 2007-2008 38e429b3eSStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 48e429b3eSStelian Pop * Lead Tech Design <www.leadtechdesign.com> 58e429b3eSStelian Pop * 68e429b3eSStelian Pop * Configuation settings for the AT91SAM9263EK board. 78e429b3eSStelian Pop * 88e429b3eSStelian Pop * See file CREDITS for list of people who contributed to this 98e429b3eSStelian Pop * project. 108e429b3eSStelian Pop * 118e429b3eSStelian Pop * This program is free software; you can redistribute it and/or 128e429b3eSStelian Pop * modify it under the terms of the GNU General Public License as 138e429b3eSStelian Pop * published by the Free Software Foundation; either version 2 of 148e429b3eSStelian Pop * the License, or (at your option) any later version. 158e429b3eSStelian Pop * 168e429b3eSStelian Pop * This program is distributed in the hope that it will be useful, 178e429b3eSStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 188e429b3eSStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 198e429b3eSStelian Pop * GNU General Public License for more details. 208e429b3eSStelian Pop * 218e429b3eSStelian Pop * You should have received a copy of the GNU General Public License 228e429b3eSStelian Pop * along with this program; if not, write to the Free Software 238e429b3eSStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 248e429b3eSStelian Pop * MA 02111-1307 USA 258e429b3eSStelian Pop */ 268e429b3eSStelian Pop 278e429b3eSStelian Pop #ifndef __CONFIG_H 288e429b3eSStelian Pop #define __CONFIG_H 298e429b3eSStelian Pop 308e429b3eSStelian Pop /* ARM asynchronous clock */ 31*56a2479cSStelian Pop #define AT91_CPU_NAME "AT91SAM9263" 328e429b3eSStelian Pop #define AT91_MAIN_CLOCK 199919000 /* from 16.367 MHz crystal */ 338e429b3eSStelian Pop #define AT91_MASTER_CLOCK 99959500 /* peripheral = main / 2 */ 348e429b3eSStelian Pop #define CFG_HZ 1000000 /* 1us resolution */ 358e429b3eSStelian Pop 368e429b3eSStelian Pop #define AT91_SLOW_CLOCK 32768 /* slow clock */ 378e429b3eSStelian Pop 388e429b3eSStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 398e429b3eSStelian Pop #define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/ 408e429b3eSStelian Pop #define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */ 418e429b3eSStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 428e429b3eSStelian Pop 438e429b3eSStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 448e429b3eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 458e429b3eSStelian Pop #define CONFIG_INITRD_TAG 1 468e429b3eSStelian Pop 478e429b3eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 488e429b3eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 498e429b3eSStelian Pop 508e429b3eSStelian Pop /* 518e429b3eSStelian Pop * Hardware drivers 528e429b3eSStelian Pop */ 538e429b3eSStelian Pop #define CONFIG_ATMEL_USART 1 548e429b3eSStelian Pop #undef CONFIG_USART0 558e429b3eSStelian Pop #undef CONFIG_USART1 568e429b3eSStelian Pop #undef CONFIG_USART2 578e429b3eSStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 588e429b3eSStelian Pop 59*56a2479cSStelian Pop /* LCD */ 60*56a2479cSStelian Pop #define CONFIG_LCD 1 61*56a2479cSStelian Pop #define LCD_BPP LCD_COLOR8 62*56a2479cSStelian Pop #define CONFIG_LCD_LOGO 1 63*56a2479cSStelian Pop #undef LCD_TEST_PATTERN 64*56a2479cSStelian Pop #define CONFIG_LCD_INFO 1 65*56a2479cSStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 66*56a2479cSStelian Pop #define CFG_WHITE_ON_BLACK 1 67*56a2479cSStelian Pop #define CONFIG_ATMEL_LCD 1 68*56a2479cSStelian Pop #define CONFIG_ATMEL_LCD_BGR555 1 69*56a2479cSStelian Pop #define CFG_CONSOLE_IS_IN_ENV 1 70*56a2479cSStelian Pop 718e429b3eSStelian Pop #define CONFIG_BOOTDELAY 3 728e429b3eSStelian Pop 738e429b3eSStelian Pop /* #define CONFIG_ENV_OVERWRITE 1 */ 748e429b3eSStelian Pop 758e429b3eSStelian Pop /* 768e429b3eSStelian Pop * BOOTP options 778e429b3eSStelian Pop */ 788e429b3eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 798e429b3eSStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 808e429b3eSStelian Pop #define CONFIG_BOOTP_GATEWAY 1 818e429b3eSStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 828e429b3eSStelian Pop 838e429b3eSStelian Pop /* 848e429b3eSStelian Pop * Command line configuration. 858e429b3eSStelian Pop */ 868e429b3eSStelian Pop #include <config_cmd_default.h> 878e429b3eSStelian Pop #undef CONFIG_CMD_BDI 888e429b3eSStelian Pop #undef CONFIG_CMD_IMI 898e429b3eSStelian Pop #undef CONFIG_CMD_AUTOSCRIPT 908e429b3eSStelian Pop #undef CONFIG_CMD_FPGA 918e429b3eSStelian Pop #undef CONFIG_CMD_LOADS 928e429b3eSStelian Pop #undef CONFIG_CMD_IMLS 938e429b3eSStelian Pop 948e429b3eSStelian Pop #define CONFIG_CMD_PING 1 958e429b3eSStelian Pop #define CONFIG_CMD_DHCP 1 968e429b3eSStelian Pop #define CONFIG_CMD_NAND 1 978e429b3eSStelian Pop #define CONFIG_CMD_USB 1 988e429b3eSStelian Pop 998e429b3eSStelian Pop /* SDRAM */ 1008e429b3eSStelian Pop #define CONFIG_NR_DRAM_BANKS 1 1018e429b3eSStelian Pop #define PHYS_SDRAM 0x20000000 1028e429b3eSStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 1038e429b3eSStelian Pop 1048e429b3eSStelian Pop /* DataFlash */ 1058e429b3eSStelian Pop #define CONFIG_HAS_DATAFLASH 1 1068e429b3eSStelian Pop #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) 1078e429b3eSStelian Pop #define CFG_MAX_DATAFLASH_BANKS 1 1088e429b3eSStelian Pop #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1098e429b3eSStelian Pop #define AT91_SPI_CLK 15000000 1108e429b3eSStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 1118e429b3eSStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1128e429b3eSStelian Pop 1138e429b3eSStelian Pop /* NOR flash, if populated */ 1148e429b3eSStelian Pop #if 1 1158e429b3eSStelian Pop #define CFG_NO_FLASH 1 1168e429b3eSStelian Pop #else 1178e429b3eSStelian Pop #define CFG_FLASH_CFI 1 1188e429b3eSStelian Pop #define CFG_FLASH_CFI_DRIVER 1 1198e429b3eSStelian Pop #define PHYS_FLASH_1 0x10000000 1208e429b3eSStelian Pop #define CFG_FLASH_BASE PHYS_FLASH_1 1218e429b3eSStelian Pop #define CFG_MAX_FLASH_SECT 256 1228e429b3eSStelian Pop #define CFG_MAX_FLASH_BANKS 1 1238e429b3eSStelian Pop #endif 1248e429b3eSStelian Pop 1258e429b3eSStelian Pop /* NAND flash */ 1268e429b3eSStelian Pop #define NAND_MAX_CHIPS 1 1278e429b3eSStelian Pop #define CFG_MAX_NAND_DEVICE 1 1288e429b3eSStelian Pop #define CFG_NAND_BASE 0x40000000 1298e429b3eSStelian Pop #define CFG_NAND_DBW_8 1 1308e429b3eSStelian Pop 1318e429b3eSStelian Pop /* Ethernet */ 1328e429b3eSStelian Pop #define CONFIG_MACB 1 1338e429b3eSStelian Pop #define CONFIG_RMII 1 1348e429b3eSStelian Pop #define CONFIG_NET_MULTI 1 1358e429b3eSStelian Pop #define CONFIG_NET_RETRY_COUNT 20 1368e429b3eSStelian Pop #define CONFIG_RESET_PHY_R 1 1378e429b3eSStelian Pop 1388e429b3eSStelian Pop /* USB */ 1398e429b3eSStelian Pop #define CONFIG_USB_OHCI_NEW 1 1408e429b3eSStelian Pop #define LITTLEENDIAN 1 1418e429b3eSStelian Pop #define CONFIG_DOS_PARTITION 1 1428e429b3eSStelian Pop #define CFG_USB_OHCI_CPU_INIT 1 1438e429b3eSStelian Pop #define CFG_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ 1448e429b3eSStelian Pop #define CFG_USB_OHCI_SLOT_NAME "at91sam9263" 1458e429b3eSStelian Pop #define CFG_USB_OHCI_MAX_ROOT_PORTS 2 1468e429b3eSStelian Pop #define CONFIG_USB_STORAGE 1 1478e429b3eSStelian Pop 1488e429b3eSStelian Pop #define CFG_LOAD_ADDR 0x22000000 /* load address */ 1498e429b3eSStelian Pop 1508e429b3eSStelian Pop #define CFG_MEMTEST_START PHYS_SDRAM 1518e429b3eSStelian Pop #define CFG_MEMTEST_END 0x23e00000 1528e429b3eSStelian Pop 1538e429b3eSStelian Pop #define CFG_USE_DATAFLASH 1 1548e429b3eSStelian Pop #undef CFG_USE_NANDFLASH 1558e429b3eSStelian Pop 1568e429b3eSStelian Pop #ifdef CFG_USE_DATAFLASH 1578e429b3eSStelian Pop 1588e429b3eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 1598e429b3eSStelian Pop #define CFG_ENV_IS_IN_DATAFLASH 1 1608e429b3eSStelian Pop #define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1618e429b3eSStelian Pop #define CFG_ENV_OFFSET 0x4200 1628e429b3eSStelian Pop #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) 1638e429b3eSStelian Pop #define CFG_ENV_SIZE 0x4200 1648e429b3eSStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 1658e429b3eSStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1668e429b3eSStelian Pop "root=/dev/mtdblock0 " \ 1678e429b3eSStelian Pop "mtdparts=at91_nand:-(root) "\ 1688e429b3eSStelian Pop "rw rootfstype=jffs2" 1698e429b3eSStelian Pop 1708e429b3eSStelian Pop #else /* CFG_USE_NANDFLASH */ 1718e429b3eSStelian Pop 1728e429b3eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 1738e429b3eSStelian Pop #define CFG_ENV_IS_IN_NAND 1 1748e429b3eSStelian Pop #define CFG_ENV_OFFSET 0x60000 1758e429b3eSStelian Pop #define CFG_ENV_OFFSET_REDUND 0x80000 1768e429b3eSStelian Pop #define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1778e429b3eSStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 1788e429b3eSStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1798e429b3eSStelian Pop "root=/dev/mtdblock5 " \ 1808e429b3eSStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ 1818e429b3eSStelian Pop "rw rootfstype=jffs2" 1828e429b3eSStelian Pop 1838e429b3eSStelian Pop #endif 1848e429b3eSStelian Pop 1858e429b3eSStelian Pop #define CONFIG_BAUDRATE 115200 1868e429b3eSStelian Pop #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 1878e429b3eSStelian Pop 1888e429b3eSStelian Pop #define CFG_PROMPT "U-Boot> " 1898e429b3eSStelian Pop #define CFG_CBSIZE 256 1908e429b3eSStelian Pop #define CFG_MAXARGS 16 1918e429b3eSStelian Pop #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) 1928e429b3eSStelian Pop #define CFG_LONGHELP 1 1938e429b3eSStelian Pop #define CONFIG_CMDLINE_EDITING 1 1948e429b3eSStelian Pop 1958e429b3eSStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 1968e429b3eSStelian Pop /* 1978e429b3eSStelian Pop * Size of malloc() pool 1988e429b3eSStelian Pop */ 1998e429b3eSStelian Pop #define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000) 2008e429b3eSStelian Pop #define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 2018e429b3eSStelian Pop 2028e429b3eSStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 2038e429b3eSStelian Pop 2048e429b3eSStelian Pop #ifdef CONFIG_USE_IRQ 2058e429b3eSStelian Pop #error CONFIG_USE_IRQ not supported 2068e429b3eSStelian Pop #endif 2078e429b3eSStelian Pop 2088e429b3eSStelian Pop #endif 209