18e429b3eSStelian Pop /* 28e429b3eSStelian Pop * (C) Copyright 2007-2008 38e429b3eSStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 48e429b3eSStelian Pop * Lead Tech Design <www.leadtechdesign.com> 58e429b3eSStelian Pop * 68e429b3eSStelian Pop * Configuation settings for the AT91SAM9263EK board. 78e429b3eSStelian Pop * 88e429b3eSStelian Pop * See file CREDITS for list of people who contributed to this 98e429b3eSStelian Pop * project. 108e429b3eSStelian Pop * 118e429b3eSStelian Pop * This program is free software; you can redistribute it and/or 128e429b3eSStelian Pop * modify it under the terms of the GNU General Public License as 138e429b3eSStelian Pop * published by the Free Software Foundation; either version 2 of 148e429b3eSStelian Pop * the License, or (at your option) any later version. 158e429b3eSStelian Pop * 168e429b3eSStelian Pop * This program is distributed in the hope that it will be useful, 178e429b3eSStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 188e429b3eSStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 198e429b3eSStelian Pop * GNU General Public License for more details. 208e429b3eSStelian Pop * 218e429b3eSStelian Pop * You should have received a copy of the GNU General Public License 228e429b3eSStelian Pop * along with this program; if not, write to the Free Software 238e429b3eSStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 248e429b3eSStelian Pop * MA 02111-1307 USA 258e429b3eSStelian Pop */ 268e429b3eSStelian Pop 278e429b3eSStelian Pop #ifndef __CONFIG_H 288e429b3eSStelian Pop #define __CONFIG_H 298e429b3eSStelian Pop 308e429b3eSStelian Pop /* ARM asynchronous clock */ 3156a2479cSStelian Pop #define AT91_CPU_NAME "AT91SAM9263" 32ad229a44SStelian Pop #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ 33ad229a44SStelian Pop #define AT91_MASTER_CLOCK 100000000 /* peripheral */ 34ad229a44SStelian Pop #define AT91_CPU_CLOCK 200000000 /* cpu */ 353aed3aa2SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ 366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ 378e429b3eSStelian Pop 388e429b3eSStelian Pop #define AT91_SLOW_CLOCK 32768 /* slow clock */ 398e429b3eSStelian Pop 408e429b3eSStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 418e429b3eSStelian Pop #define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/ 428e429b3eSStelian Pop #define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */ 438e429b3eSStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 448e429b3eSStelian Pop 458e429b3eSStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 468e429b3eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 478e429b3eSStelian Pop #define CONFIG_INITRD_TAG 1 488e429b3eSStelian Pop 498e429b3eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 508e429b3eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 518e429b3eSStelian Pop 528e429b3eSStelian Pop /* 538e429b3eSStelian Pop * Hardware drivers 548e429b3eSStelian Pop */ 558e429b3eSStelian Pop #define CONFIG_ATMEL_USART 1 568e429b3eSStelian Pop #undef CONFIG_USART0 578e429b3eSStelian Pop #undef CONFIG_USART1 588e429b3eSStelian Pop #undef CONFIG_USART2 598e429b3eSStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 608e429b3eSStelian Pop 6156a2479cSStelian Pop /* LCD */ 6256a2479cSStelian Pop #define CONFIG_LCD 1 6356a2479cSStelian Pop #define LCD_BPP LCD_COLOR8 6456a2479cSStelian Pop #define CONFIG_LCD_LOGO 1 6556a2479cSStelian Pop #undef LCD_TEST_PATTERN 6656a2479cSStelian Pop #define CONFIG_LCD_INFO 1 6756a2479cSStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_WHITE_ON_BLACK 1 6956a2479cSStelian Pop #define CONFIG_ATMEL_LCD 1 7056a2479cSStelian Pop #define CONFIG_ATMEL_LCD_BGR555 1 716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 7256a2479cSStelian Pop 73a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 74a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 75a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */ 76a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */ 77a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */ 78a484b00bSJean-Christophe PLAGNIOL-VILLARD 798e429b3eSStelian Pop #define CONFIG_BOOTDELAY 3 808e429b3eSStelian Pop 818e429b3eSStelian Pop /* 828e429b3eSStelian Pop * BOOTP options 838e429b3eSStelian Pop */ 848e429b3eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 858e429b3eSStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 868e429b3eSStelian Pop #define CONFIG_BOOTP_GATEWAY 1 878e429b3eSStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 888e429b3eSStelian Pop 898e429b3eSStelian Pop /* 908e429b3eSStelian Pop * Command line configuration. 918e429b3eSStelian Pop */ 928e429b3eSStelian Pop #include <config_cmd_default.h> 938e429b3eSStelian Pop #undef CONFIG_CMD_BDI 948e429b3eSStelian Pop #undef CONFIG_CMD_FPGA 9574de7aefSWolfgang Denk #undef CONFIG_CMD_IMI 968e429b3eSStelian Pop #undef CONFIG_CMD_IMLS 9774de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS 9874de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE 998e429b3eSStelian Pop 1008e429b3eSStelian Pop #define CONFIG_CMD_PING 1 1018e429b3eSStelian Pop #define CONFIG_CMD_DHCP 1 1028e429b3eSStelian Pop #define CONFIG_CMD_NAND 1 1038e429b3eSStelian Pop #define CONFIG_CMD_USB 1 1048e429b3eSStelian Pop 1058e429b3eSStelian Pop /* SDRAM */ 1068e429b3eSStelian Pop #define CONFIG_NR_DRAM_BANKS 1 1078e429b3eSStelian Pop #define PHYS_SDRAM 0x20000000 1088e429b3eSStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 1098e429b3eSStelian Pop 1108e429b3eSStelian Pop /* DataFlash */ 111*4758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI 1128e429b3eSStelian Pop #define CONFIG_HAS_DATAFLASH 1 1136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 1156d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1168e429b3eSStelian Pop #define AT91_SPI_CLK 15000000 1178e429b3eSStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 1188e429b3eSStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1198e429b3eSStelian Pop 1208e429b3eSStelian Pop /* NOR flash, if populated */ 1218e429b3eSStelian Pop #if 1 1226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 1238e429b3eSStelian Pop #else 1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI 1 12500b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER 1 1268e429b3eSStelian Pop #define PHYS_FLASH_1 0x10000000 1276d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 1286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT 256 1296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS 1 1308e429b3eSStelian Pop #endif 1318e429b3eSStelian Pop 1328e429b3eSStelian Pop /* NAND flash */ 13374c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 13474c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 1356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1376d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 13874c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */ 13974c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 14074c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */ 14174c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 14274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 14374c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 14474c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 1458e429b3eSStelian Pop 1468e429b3eSStelian Pop /* Ethernet */ 1478e429b3eSStelian Pop #define CONFIG_MACB 1 1488e429b3eSStelian Pop #define CONFIG_RMII 1 1498e429b3eSStelian Pop #define CONFIG_NET_MULTI 1 1508e429b3eSStelian Pop #define CONFIG_NET_RETRY_COUNT 20 1518e429b3eSStelian Pop #define CONFIG_RESET_PHY_R 1 1528e429b3eSStelian Pop 1538e429b3eSStelian Pop /* USB */ 1542b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL 1558e429b3eSStelian Pop #define CONFIG_USB_OHCI_NEW 1 1568e429b3eSStelian Pop #define CONFIG_DOS_PARTITION 1 1576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 1586d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ 1596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" 1606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1618e429b3eSStelian Pop #define CONFIG_USB_STORAGE 1 1623e0cda07SStelian Pop #define CONFIG_CMD_FAT 1 1638e429b3eSStelian Pop 1646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1658e429b3eSStelian Pop 1666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 1688e429b3eSStelian Pop 1696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH 1708e429b3eSStelian Pop 1718e429b3eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 172057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1740e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1760e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 1778e429b3eSStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 1788e429b3eSStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1798e429b3eSStelian Pop "root=/dev/mtdblock0 " \ 1808e429b3eSStelian Pop "mtdparts=at91_nand:-(root) "\ 1818e429b3eSStelian Pop "rw rootfstype=jffs2" 1828e429b3eSStelian Pop 1836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 1848e429b3eSStelian Pop 1858e429b3eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 18651bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 1870e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 1880e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 1890e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1908e429b3eSStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 1918e429b3eSStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 1928e429b3eSStelian Pop "root=/dev/mtdblock5 " \ 1938e429b3eSStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ 1948e429b3eSStelian Pop "rw rootfstype=jffs2" 1958e429b3eSStelian Pop 1968e429b3eSStelian Pop #endif 1978e429b3eSStelian Pop 1988e429b3eSStelian Pop #define CONFIG_BAUDRATE 115200 1996d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 2008e429b3eSStelian Pop 2016d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 2026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 2036d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 2046d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 2056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 2068e429b3eSStelian Pop #define CONFIG_CMDLINE_EDITING 1 2078e429b3eSStelian Pop 2088e429b3eSStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 2098e429b3eSStelian Pop /* 2108e429b3eSStelian Pop * Size of malloc() pool 2118e429b3eSStelian Pop */ 2126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 2136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 2148e429b3eSStelian Pop 2158e429b3eSStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 2168e429b3eSStelian Pop 2178e429b3eSStelian Pop #ifdef CONFIG_USE_IRQ 2188e429b3eSStelian Pop #error CONFIG_USE_IRQ not supported 2198e429b3eSStelian Pop #endif 2208e429b3eSStelian Pop 2218e429b3eSStelian Pop #endif 222