xref: /rk3399_rockchip-uboot/include/configs/at91sam9261ek.h (revision f7aea46d6ad9c257d2fbea7238cc8796aaa733f1)
1d99a8ff6SStelian Pop /*
2d99a8ff6SStelian Pop  * (C) Copyright 2007-2008
3d99a8ff6SStelian Pop  * Stelian Pop <stelian.pop@leadtechdesign.com>
4d99a8ff6SStelian Pop  * Lead Tech Design <www.leadtechdesign.com>
5d99a8ff6SStelian Pop  *
6d99a8ff6SStelian Pop  * Configuation settings for the AT91SAM9261EK board.
7d99a8ff6SStelian Pop  *
8d99a8ff6SStelian Pop  * See file CREDITS for list of people who contributed to this
9d99a8ff6SStelian Pop  * project.
10d99a8ff6SStelian Pop  *
11d99a8ff6SStelian Pop  * This program is free software; you can redistribute it and/or
12d99a8ff6SStelian Pop  * modify it under the terms of the GNU General Public License as
13d99a8ff6SStelian Pop  * published by the Free Software Foundation; either version 2 of
14d99a8ff6SStelian Pop  * the License, or (at your option) any later version.
15d99a8ff6SStelian Pop  *
16d99a8ff6SStelian Pop  * This program is distributed in the hope that it will be useful,
17d99a8ff6SStelian Pop  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18d99a8ff6SStelian Pop  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19d99a8ff6SStelian Pop  * GNU General Public License for more details.
20d99a8ff6SStelian Pop  *
21d99a8ff6SStelian Pop  * You should have received a copy of the GNU General Public License
22d99a8ff6SStelian Pop  * along with this program; if not, write to the Free Software
23d99a8ff6SStelian Pop  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24d99a8ff6SStelian Pop  * MA 02111-1307 USA
25d99a8ff6SStelian Pop  */
26d99a8ff6SStelian Pop 
27d99a8ff6SStelian Pop #ifndef __CONFIG_H
28d99a8ff6SStelian Pop #define __CONFIG_H
29d99a8ff6SStelian Pop 
30d99a8ff6SStelian Pop /* ARM asynchronous clock */
31*f7aea46dSXu, Hong #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
327c966a8bSAchim Ehrlich #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
336ebff365SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ			1000
34d99a8ff6SStelian Pop 
35*f7aea46dSXu, Hong #ifdef CONFIG_AT91SAM9G10
36*f7aea46dSXu, Hong #define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK*/
375ccc2d99SSedji Gaouaou #else
38*f7aea46dSXu, Hong #define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK*/
395ccc2d99SSedji Gaouaou #endif
40*f7aea46dSXu, Hong 
41*f7aea46dSXu, Hong #include <asm/hardware.h>
42*f7aea46dSXu, Hong 
43dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT
44d99a8ff6SStelian Pop #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
45d99a8ff6SStelian Pop 
46*f7aea46dSXu, Hong #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
47*f7aea46dSXu, Hong #define CONFIG_SETUP_MEMORY_TAGS
48*f7aea46dSXu, Hong #define CONFIG_INITRD_TAG
49d99a8ff6SStelian Pop 
50d99a8ff6SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT
51d99a8ff6SStelian Pop 
52*f7aea46dSXu, Hong #define CONFIG_DISPLAY_CPUINFO
53*f7aea46dSXu, Hong 
54*f7aea46dSXu, Hong #define CONFIG_ATMEL_LEGACY
55*f7aea46dSXu, Hong #define CONFIG_SYS_TEXT_BASE		0x21f00000
56*f7aea46dSXu, Hong 
57d99a8ff6SStelian Pop /*
58d99a8ff6SStelian Pop  * Hardware drivers
59d99a8ff6SStelian Pop  */
60*f7aea46dSXu, Hong 
61*f7aea46dSXu, Hong /* gpio */
62*f7aea46dSXu, Hong #define CONFIG_AT91_GPIO
63*f7aea46dSXu, Hong #define CONFIG_AT91_GPIO_PULLUP		1
64*f7aea46dSXu, Hong 
65*f7aea46dSXu, Hong /* serial console */
66*f7aea46dSXu, Hong #define CONFIG_ATMEL_USART
67*f7aea46dSXu, Hong #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
68*f7aea46dSXu, Hong #define CONFIG_USART_ID			ATMEL_ID_SYS
69*f7aea46dSXu, Hong #define CONFIG_BAUDRATE			115200
70*f7aea46dSXu, Hong #define CONFIG_SYS_BAUDRATE_TABLE	{115200, 57600, 38400, 19200, 9600}
71d99a8ff6SStelian Pop 
72820f2a95SStelian Pop /* LCD */
73*f7aea46dSXu, Hong #define CONFIG_LCD
74820f2a95SStelian Pop #define LCD_BPP				LCD_COLOR8
75*f7aea46dSXu, Hong #define CONFIG_LCD_LOGO
76820f2a95SStelian Pop #undef LCD_TEST_PATTERN
77*f7aea46dSXu, Hong #define CONFIG_LCD_INFO
78*f7aea46dSXu, Hong #define CONFIG_LCD_INFO_BELOW_LOGO
79*f7aea46dSXu, Hong #define CONFIG_SYS_WHITE_ON_BLACK
80*f7aea46dSXu, Hong #define CONFIG_ATMEL_LCD
815ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9261EK
82*f7aea46dSXu, Hong #define CONFIG_ATMEL_LCD_BGR555
835ccc2d99SSedji Gaouaou #endif
84*f7aea46dSXu, Hong 
85*f7aea46dSXu, Hong #define CONFIG_SYS_CONSOLE_IS_IN_ENV
86820f2a95SStelian Pop 
87a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */
88a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED
89a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_RED_LED		AT91_PIN_PA23	/* this is the power led */
90a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
91a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */
92a484b00bSJean-Christophe PLAGNIOL-VILLARD 
93d99a8ff6SStelian Pop #define CONFIG_BOOTDELAY	3
94d99a8ff6SStelian Pop 
95d99a8ff6SStelian Pop /*
96d99a8ff6SStelian Pop  * BOOTP options
97d99a8ff6SStelian Pop  */
98*f7aea46dSXu, Hong #define CONFIG_BOOTP_BOOTFILESIZE
99*f7aea46dSXu, Hong #define CONFIG_BOOTP_BOOTPATH
100*f7aea46dSXu, Hong #define CONFIG_BOOTP_GATEWAY
101*f7aea46dSXu, Hong #define CONFIG_BOOTP_HOSTNAME
102d99a8ff6SStelian Pop 
103d99a8ff6SStelian Pop /*
104d99a8ff6SStelian Pop  * Command line configuration.
105d99a8ff6SStelian Pop  */
106d99a8ff6SStelian Pop #include <config_cmd_default.h>
107d99a8ff6SStelian Pop #undef CONFIG_CMD_BDI
108d99a8ff6SStelian Pop #undef CONFIG_CMD_FPGA
10974de7aefSWolfgang Denk #undef CONFIG_CMD_IMI
110d99a8ff6SStelian Pop #undef CONFIG_CMD_IMLS
11174de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS
11274de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE
113d99a8ff6SStelian Pop 
114*f7aea46dSXu, Hong #define CONFIG_CMD_PING
115*f7aea46dSXu, Hong #define CONFIG_CMD_DHCP
116*f7aea46dSXu, Hong #define CONFIG_CMD_NAND
117*f7aea46dSXu, Hong #define CONFIG_CMD_USB
118d99a8ff6SStelian Pop 
119d99a8ff6SStelian Pop /* SDRAM */
120d99a8ff6SStelian Pop #define CONFIG_NR_DRAM_BANKS		1
121*f7aea46dSXu, Hong #define CONFIG_SYS_SDRAM_BASE		0x20000000
122*f7aea46dSXu, Hong #define CONFIG_SYS_SDRAM_SIZE		0x04000000
123*f7aea46dSXu, Hong #define CONFIG_SYS_INIT_SP_ADDR \
124*f7aea46dSXu, Hong 	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
125d99a8ff6SStelian Pop 
126d99a8ff6SStelian Pop /* DataFlash */
1274758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI
128*f7aea46dSXu, Hong #define CONFIG_HAS_DATAFLASH
1296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
1316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
1326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
133d99a8ff6SStelian Pop #define AT91_SPI_CLK				15000000
134d99a8ff6SStelian Pop #define DATAFLASH_TCSS				(0x1a << 16)
135d99a8ff6SStelian Pop #define DATAFLASH_TCHS				(0x1 << 24)
136d99a8ff6SStelian Pop 
137d99a8ff6SStelian Pop /* NAND flash */
13874c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND
13974c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL
1406d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE		1
1416d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE			0x40000000
142*f7aea46dSXu, Hong #define CONFIG_SYS_NAND_DBW_8
14374c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD22 */
14474c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
14574c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD21 */
14674c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
14774c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
14874c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15
1492eb99ca8SWolfgang Denk 
15074c076d6SJean-Christophe PLAGNIOL-VILLARD #endif
151d99a8ff6SStelian Pop 
152d99a8ff6SStelian Pop /* NOR flash - no real flash on this board */
153*f7aea46dSXu, Hong #define CONFIG_SYS_NO_FLASH
154d99a8ff6SStelian Pop 
155d99a8ff6SStelian Pop /* Ethernet */
156*f7aea46dSXu, Hong #define CONFIG_NET_MULTI
157*f7aea46dSXu, Hong #define CONFIG_DRIVER_DM9000
158d99a8ff6SStelian Pop #define CONFIG_DM9000_BASE		0x30000000
159d99a8ff6SStelian Pop #define DM9000_IO			CONFIG_DM9000_BASE
160d99a8ff6SStelian Pop #define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
161*f7aea46dSXu, Hong #define CONFIG_DM9000_USE_16BIT
162*f7aea46dSXu, Hong #define CONFIG_DM9000_NO_SROM
163d99a8ff6SStelian Pop #define CONFIG_NET_RETRY_COUNT		20
164*f7aea46dSXu, Hong #define CONFIG_RESET_PHY_R
165d99a8ff6SStelian Pop 
166d99a8ff6SStelian Pop /* USB */
1672b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL
168*f7aea46dSXu, Hong #define CONFIG_USB_OHCI_NEW
169*f7aea46dSXu, Hong #define CONFIG_DOS_PARTITION
170*f7aea46dSXu, Hong #define CONFIG_SYS_USB_OHCI_CPU_INIT
1716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
1725ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9G10EK
1735ccc2d99SSedji Gaouaou #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
1745ccc2d99SSedji Gaouaou #else
1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
1765ccc2d99SSedji Gaouaou #endif
1776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
178*f7aea46dSXu, Hong #define CONFIG_USB_STORAGE
179*f7aea46dSXu, Hong #define CONFIG_CMD_FAT
180d99a8ff6SStelian Pop 
1816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
182d99a8ff6SStelian Pop 
183*f7aea46dSXu, Hong #define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
1846d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END			0x23e00000
185d99a8ff6SStelian Pop 
1866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
187d99a8ff6SStelian Pop 
188d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */
189*f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_DATAFLASH
1906d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
1910e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET	0x4200
1926d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
1930e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x4200
194d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
195d99a8ff6SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
196d99a8ff6SStelian Pop 				"root=/dev/mtdblock0 "			\
197918319c7SAlbin Tonnerre 				"mtdparts=atmel_nand:-(root) "		\
198d99a8ff6SStelian Pop 				"rw rootfstype=jffs2"
199d99a8ff6SStelian Pop 
20089a7a87fSNicolas Ferre #elif CONFIG_SYS_USE_DATAFLASH_CS3
20189a7a87fSNicolas Ferre 
20289a7a87fSNicolas Ferre /* bootstrap + u-boot + env + linux in dataflash on CS3 */
203*f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_DATAFLASH
20489a7a87fSNicolas Ferre #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
20589a7a87fSNicolas Ferre #define CONFIG_ENV_OFFSET	0x4200
20689a7a87fSNicolas Ferre #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
20789a7a87fSNicolas Ferre #define CONFIG_ENV_SIZE		0x4200
20889a7a87fSNicolas Ferre #define CONFIG_BOOTCOMMAND	"cp.b 0xD0042000 0x22000000 0x210000; bootm"
20989a7a87fSNicolas Ferre #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
21089a7a87fSNicolas Ferre 				"root=/dev/mtdblock0 "			\
211918319c7SAlbin Tonnerre 				"mtdparts=atmel_nand:-(root) "		\
21289a7a87fSNicolas Ferre 				"rw rootfstype=jffs2"
21389a7a87fSNicolas Ferre 
2146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */
215d99a8ff6SStelian Pop 
216d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */
217*f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_NAND
2180e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x60000
2190e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND	0x80000
2200e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
221d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
222d99a8ff6SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
223d99a8ff6SStelian Pop 				"root=/dev/mtdblock5 "			\
224918319c7SAlbin Tonnerre 				"mtdparts=atmel_nand:128k(bootstrap)ro,"	\
225d99a8ff6SStelian Pop 				"256k(uboot)ro,128k(env1)ro,"		\
226d99a8ff6SStelian Pop 				"128k(env2)ro,2M(linux),-(root) "	\
227d99a8ff6SStelian Pop 				"rw rootfstype=jffs2"
228d99a8ff6SStelian Pop 
229d99a8ff6SStelian Pop #endif
230d99a8ff6SStelian Pop 
2316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT		"U-Boot> "
2326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256
2336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16
2346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
235*f7aea46dSXu, Hong #define CONFIG_SYS_LONGHELP
236*f7aea46dSXu, Hong #define CONFIG_CMDLINE_EDITING
237d99a8ff6SStelian Pop 
238d99a8ff6SStelian Pop /*
239d99a8ff6SStelian Pop  * Size of malloc() pool
240d99a8ff6SStelian Pop  */
2416d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
242d99a8ff6SStelian Pop 
243d99a8ff6SStelian Pop #define CONFIG_STACKSIZE		(32*1024)	/* regular stack */
244d99a8ff6SStelian Pop 
245d99a8ff6SStelian Pop #ifdef CONFIG_USE_IRQ
246d99a8ff6SStelian Pop #error CONFIG_USE_IRQ not supported
247d99a8ff6SStelian Pop #endif
248d99a8ff6SStelian Pop 
249d99a8ff6SStelian Pop #endif
250