xref: /rk3399_rockchip-uboot/include/configs/at91sam9261ek.h (revision dcd2f1a0d2875a1386535e2e0db9bfbd57a8fadb)
1d99a8ff6SStelian Pop /*
2d99a8ff6SStelian Pop  * (C) Copyright 2007-2008
3c9e798d3SStelian Pop  * Stelian Pop <stelian@popies.net>
4d99a8ff6SStelian Pop  * Lead Tech Design <www.leadtechdesign.com>
5d99a8ff6SStelian Pop  *
6d99a8ff6SStelian Pop  * Configuation settings for the AT91SAM9261EK board.
7d99a8ff6SStelian Pop  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
9d99a8ff6SStelian Pop  */
10d99a8ff6SStelian Pop 
11d99a8ff6SStelian Pop #ifndef __CONFIG_H
12d99a8ff6SStelian Pop #define __CONFIG_H
13d99a8ff6SStelian Pop 
14d99a8ff6SStelian Pop /* ARM asynchronous clock */
15f7aea46dSXu, Hong #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
167c966a8bSAchim Ehrlich #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
176ebff365SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ			1000
18d99a8ff6SStelian Pop 
19f7aea46dSXu, Hong #ifdef CONFIG_AT91SAM9G10
20f7aea46dSXu, Hong #define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK*/
215ccc2d99SSedji Gaouaou #else
22f7aea46dSXu, Hong #define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK*/
235ccc2d99SSedji Gaouaou #endif
24f7aea46dSXu, Hong 
25f7aea46dSXu, Hong #include <asm/hardware.h>
26f7aea46dSXu, Hong 
27f7aea46dSXu, Hong #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
28f7aea46dSXu, Hong #define CONFIG_SETUP_MEMORY_TAGS
29f7aea46dSXu, Hong #define CONFIG_INITRD_TAG
30d99a8ff6SStelian Pop 
31d99a8ff6SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT
32d99a8ff6SStelian Pop 
33f7aea46dSXu, Hong #define CONFIG_DISPLAY_CPUINFO
34f7aea46dSXu, Hong 
35dc3e30baSBo Shen #define CONFIG_OF_LIBFDT
36dc3e30baSBo Shen 
37f7aea46dSXu, Hong #define CONFIG_ATMEL_LEGACY
38f7aea46dSXu, Hong #define CONFIG_SYS_TEXT_BASE		0x21f00000
39f7aea46dSXu, Hong 
40d99a8ff6SStelian Pop /*
41d99a8ff6SStelian Pop  * Hardware drivers
42d99a8ff6SStelian Pop  */
43f7aea46dSXu, Hong 
44f7aea46dSXu, Hong /* gpio */
45f7aea46dSXu, Hong #define CONFIG_AT91_GPIO
46f7aea46dSXu, Hong #define CONFIG_AT91_GPIO_PULLUP		1
47f7aea46dSXu, Hong 
48f7aea46dSXu, Hong /* serial console */
49f7aea46dSXu, Hong #define CONFIG_ATMEL_USART
50f7aea46dSXu, Hong #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
51f7aea46dSXu, Hong #define CONFIG_USART_ID			ATMEL_ID_SYS
52f7aea46dSXu, Hong #define CONFIG_BAUDRATE			115200
53d99a8ff6SStelian Pop 
54820f2a95SStelian Pop /* LCD */
55f7aea46dSXu, Hong #define CONFIG_LCD
56820f2a95SStelian Pop #define LCD_BPP				LCD_COLOR8
57f7aea46dSXu, Hong #define CONFIG_LCD_LOGO
58820f2a95SStelian Pop #undef LCD_TEST_PATTERN
59f7aea46dSXu, Hong #define CONFIG_LCD_INFO
60f7aea46dSXu, Hong #define CONFIG_LCD_INFO_BELOW_LOGO
61f7aea46dSXu, Hong #define CONFIG_SYS_WHITE_ON_BLACK
62f7aea46dSXu, Hong #define CONFIG_ATMEL_LCD
635ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9261EK
64f7aea46dSXu, Hong #define CONFIG_ATMEL_LCD_BGR555
655ccc2d99SSedji Gaouaou #endif
66f7aea46dSXu, Hong 
67f7aea46dSXu, Hong #define CONFIG_SYS_CONSOLE_IS_IN_ENV
68820f2a95SStelian Pop 
69a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */
70a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED
71a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_RED_LED		AT91_PIN_PA23	/* this is the power led */
72a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
73a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */
74a484b00bSJean-Christophe PLAGNIOL-VILLARD 
75d99a8ff6SStelian Pop #define CONFIG_BOOTDELAY	3
76d99a8ff6SStelian Pop 
77d99a8ff6SStelian Pop /*
78d99a8ff6SStelian Pop  * BOOTP options
79d99a8ff6SStelian Pop  */
80f7aea46dSXu, Hong #define CONFIG_BOOTP_BOOTFILESIZE
81f7aea46dSXu, Hong #define CONFIG_BOOTP_BOOTPATH
82f7aea46dSXu, Hong #define CONFIG_BOOTP_GATEWAY
83f7aea46dSXu, Hong #define CONFIG_BOOTP_HOSTNAME
84d99a8ff6SStelian Pop 
85d99a8ff6SStelian Pop /*
86d99a8ff6SStelian Pop  * Command line configuration.
87d99a8ff6SStelian Pop  */
88d99a8ff6SStelian Pop #include <config_cmd_default.h>
89d99a8ff6SStelian Pop #undef CONFIG_CMD_BDI
90d99a8ff6SStelian Pop #undef CONFIG_CMD_FPGA
9174de7aefSWolfgang Denk #undef CONFIG_CMD_IMI
92d99a8ff6SStelian Pop #undef CONFIG_CMD_IMLS
9374de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS
9474de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE
95d99a8ff6SStelian Pop 
96f7aea46dSXu, Hong #define CONFIG_CMD_PING
97f7aea46dSXu, Hong #define CONFIG_CMD_DHCP
98f7aea46dSXu, Hong #define CONFIG_CMD_NAND
99f7aea46dSXu, Hong #define CONFIG_CMD_USB
100d99a8ff6SStelian Pop 
101d99a8ff6SStelian Pop /* SDRAM */
102d99a8ff6SStelian Pop #define CONFIG_NR_DRAM_BANKS		1
103f7aea46dSXu, Hong #define CONFIG_SYS_SDRAM_BASE		0x20000000
104f7aea46dSXu, Hong #define CONFIG_SYS_SDRAM_SIZE		0x04000000
105f7aea46dSXu, Hong #define CONFIG_SYS_INIT_SP_ADDR \
106f7aea46dSXu, Hong 	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
107d99a8ff6SStelian Pop 
108d99a8ff6SStelian Pop /* DataFlash */
1094758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI
110f7aea46dSXu, Hong #define CONFIG_HAS_DATAFLASH
1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
1126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
1136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
1146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
115d99a8ff6SStelian Pop #define AT91_SPI_CLK				15000000
116d99a8ff6SStelian Pop #define DATAFLASH_TCSS				(0x1a << 16)
117d99a8ff6SStelian Pop #define DATAFLASH_TCHS				(0x1 << 24)
118d99a8ff6SStelian Pop 
119d99a8ff6SStelian Pop /* NAND flash */
12074c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND
12174c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL
1226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE		1
1236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE			0x40000000
124f7aea46dSXu, Hong #define CONFIG_SYS_NAND_DBW_8
12574c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD22 */
12674c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
12774c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD21 */
12874c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
12974c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
13074c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15
1312eb99ca8SWolfgang Denk 
13274c076d6SJean-Christophe PLAGNIOL-VILLARD #endif
133d99a8ff6SStelian Pop 
134d99a8ff6SStelian Pop /* NOR flash - no real flash on this board */
135f7aea46dSXu, Hong #define CONFIG_SYS_NO_FLASH
136d99a8ff6SStelian Pop 
137d99a8ff6SStelian Pop /* Ethernet */
138f7aea46dSXu, Hong #define CONFIG_DRIVER_DM9000
139d99a8ff6SStelian Pop #define CONFIG_DM9000_BASE		0x30000000
140d99a8ff6SStelian Pop #define DM9000_IO			CONFIG_DM9000_BASE
141d99a8ff6SStelian Pop #define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
142f7aea46dSXu, Hong #define CONFIG_DM9000_USE_16BIT
143f7aea46dSXu, Hong #define CONFIG_DM9000_NO_SROM
144d99a8ff6SStelian Pop #define CONFIG_NET_RETRY_COUNT		20
145f7aea46dSXu, Hong #define CONFIG_RESET_PHY_R
146d99a8ff6SStelian Pop 
147d99a8ff6SStelian Pop /* USB */
1482b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL
149*dcd2f1a0SBo Shen #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
150f7aea46dSXu, Hong #define CONFIG_USB_OHCI_NEW
151f7aea46dSXu, Hong #define CONFIG_DOS_PARTITION
152f7aea46dSXu, Hong #define CONFIG_SYS_USB_OHCI_CPU_INIT
1536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
1545ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9G10EK
1555ccc2d99SSedji Gaouaou #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
1565ccc2d99SSedji Gaouaou #else
1576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
1585ccc2d99SSedji Gaouaou #endif
1596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
160f7aea46dSXu, Hong #define CONFIG_USB_STORAGE
161f7aea46dSXu, Hong #define CONFIG_CMD_FAT
162d99a8ff6SStelian Pop 
1636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
164d99a8ff6SStelian Pop 
165f7aea46dSXu, Hong #define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
1666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END			0x23e00000
167d99a8ff6SStelian Pop 
1686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
169d99a8ff6SStelian Pop 
170d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */
171f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_DATAFLASH
1726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
1730e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET	0x4200
1746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
1750e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x4200
176e139cb31SAlexandre Belloni #define CONFIG_BOOTCOMMAND	"cp.b 0xC0084000 0x22000000 0x210000; bootm"
177d99a8ff6SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
178d99a8ff6SStelian Pop 				"root=/dev/mtdblock0 "			\
179918319c7SAlbin Tonnerre 				"mtdparts=atmel_nand:-(root) "		\
180d99a8ff6SStelian Pop 				"rw rootfstype=jffs2"
181d99a8ff6SStelian Pop 
18289a7a87fSNicolas Ferre #elif CONFIG_SYS_USE_DATAFLASH_CS3
18389a7a87fSNicolas Ferre 
18489a7a87fSNicolas Ferre /* bootstrap + u-boot + env + linux in dataflash on CS3 */
185f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_DATAFLASH
18689a7a87fSNicolas Ferre #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
18789a7a87fSNicolas Ferre #define CONFIG_ENV_OFFSET	0x4200
18889a7a87fSNicolas Ferre #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
18989a7a87fSNicolas Ferre #define CONFIG_ENV_SIZE		0x4200
190e139cb31SAlexandre Belloni #define CONFIG_BOOTCOMMAND	"cp.b 0xD0084000 0x22000000 0x210000; bootm"
19189a7a87fSNicolas Ferre #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
19289a7a87fSNicolas Ferre 				"root=/dev/mtdblock0 "			\
193918319c7SAlbin Tonnerre 				"mtdparts=atmel_nand:-(root) "		\
19489a7a87fSNicolas Ferre 				"rw rootfstype=jffs2"
19589a7a87fSNicolas Ferre 
1966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */
197d99a8ff6SStelian Pop 
198d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */
199f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_NAND
2000c58cfa9SBo Shen #define CONFIG_ENV_OFFSET		0xc0000
2010c58cfa9SBo Shen #define CONFIG_ENV_OFFSET_REDUND	0x100000
2020e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
2030c58cfa9SBo Shen #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
2040c58cfa9SBo Shen #define CONFIG_BOOTARGS							\
2050c58cfa9SBo Shen 	"console=ttyS0,115200 earlyprintk "				\
2060c58cfa9SBo Shen 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
2070c58cfa9SBo Shen 	"256k(env),256k(env_redundant),256k(spare),"			\
2080c58cfa9SBo Shen 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
2090c58cfa9SBo Shen 	"root=/dev/mtdblock7 rw rootfstype=jffs2"
210d99a8ff6SStelian Pop #endif
211d99a8ff6SStelian Pop 
2126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT		"U-Boot> "
2136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256
2146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16
2156d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
216f7aea46dSXu, Hong #define CONFIG_SYS_LONGHELP
217f7aea46dSXu, Hong #define CONFIG_CMDLINE_EDITING
218e139cb31SAlexandre Belloni #define CONFIG_AUTO_COMPLETE
219d99a8ff6SStelian Pop 
220d99a8ff6SStelian Pop /*
221d99a8ff6SStelian Pop  * Size of malloc() pool
222d99a8ff6SStelian Pop  */
2236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
224d99a8ff6SStelian Pop 
225d99a8ff6SStelian Pop #endif
226