1d99a8ff6SStelian Pop /* 2d99a8ff6SStelian Pop * (C) Copyright 2007-2008 3c9e798d3SStelian Pop * Stelian Pop <stelian@popies.net> 4d99a8ff6SStelian Pop * Lead Tech Design <www.leadtechdesign.com> 5d99a8ff6SStelian Pop * 6d99a8ff6SStelian Pop * Configuation settings for the AT91SAM9261EK board. 7d99a8ff6SStelian Pop * 8d99a8ff6SStelian Pop * See file CREDITS for list of people who contributed to this 9d99a8ff6SStelian Pop * project. 10d99a8ff6SStelian Pop * 11d99a8ff6SStelian Pop * This program is free software; you can redistribute it and/or 12d99a8ff6SStelian Pop * modify it under the terms of the GNU General Public License as 13d99a8ff6SStelian Pop * published by the Free Software Foundation; either version 2 of 14d99a8ff6SStelian Pop * the License, or (at your option) any later version. 15d99a8ff6SStelian Pop * 16d99a8ff6SStelian Pop * This program is distributed in the hope that it will be useful, 17d99a8ff6SStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 18d99a8ff6SStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19d99a8ff6SStelian Pop * GNU General Public License for more details. 20d99a8ff6SStelian Pop * 21d99a8ff6SStelian Pop * You should have received a copy of the GNU General Public License 22d99a8ff6SStelian Pop * along with this program; if not, write to the Free Software 23d99a8ff6SStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24d99a8ff6SStelian Pop * MA 02111-1307 USA 25d99a8ff6SStelian Pop */ 26d99a8ff6SStelian Pop 27d99a8ff6SStelian Pop #ifndef __CONFIG_H 28d99a8ff6SStelian Pop #define __CONFIG_H 29d99a8ff6SStelian Pop 30d99a8ff6SStelian Pop /* ARM asynchronous clock */ 31f7aea46dSXu, Hong #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 327c966a8bSAchim Ehrlich #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 336ebff365SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000 34d99a8ff6SStelian Pop 35f7aea46dSXu, Hong #ifdef CONFIG_AT91SAM9G10 36f7aea46dSXu, Hong #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/ 375ccc2d99SSedji Gaouaou #else 38f7aea46dSXu, Hong #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/ 395ccc2d99SSedji Gaouaou #endif 40f7aea46dSXu, Hong 41f7aea46dSXu, Hong #include <asm/hardware.h> 42f7aea46dSXu, Hong 43f7aea46dSXu, Hong #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 44f7aea46dSXu, Hong #define CONFIG_SETUP_MEMORY_TAGS 45f7aea46dSXu, Hong #define CONFIG_INITRD_TAG 46d99a8ff6SStelian Pop 47d99a8ff6SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 48d99a8ff6SStelian Pop 49f7aea46dSXu, Hong #define CONFIG_DISPLAY_CPUINFO 50f7aea46dSXu, Hong 51*dc3e30baSBo Shen #define CONFIG_OF_LIBFDT 52*dc3e30baSBo Shen 53f7aea46dSXu, Hong #define CONFIG_ATMEL_LEGACY 54f7aea46dSXu, Hong #define CONFIG_SYS_TEXT_BASE 0x21f00000 55f7aea46dSXu, Hong 56d99a8ff6SStelian Pop /* 57d99a8ff6SStelian Pop * Hardware drivers 58d99a8ff6SStelian Pop */ 59f7aea46dSXu, Hong 60f7aea46dSXu, Hong /* gpio */ 61f7aea46dSXu, Hong #define CONFIG_AT91_GPIO 62f7aea46dSXu, Hong #define CONFIG_AT91_GPIO_PULLUP 1 63f7aea46dSXu, Hong 64f7aea46dSXu, Hong /* serial console */ 65f7aea46dSXu, Hong #define CONFIG_ATMEL_USART 66f7aea46dSXu, Hong #define CONFIG_USART_BASE ATMEL_BASE_DBGU 67f7aea46dSXu, Hong #define CONFIG_USART_ID ATMEL_ID_SYS 68f7aea46dSXu, Hong #define CONFIG_BAUDRATE 115200 69d99a8ff6SStelian Pop 70820f2a95SStelian Pop /* LCD */ 71f7aea46dSXu, Hong #define CONFIG_LCD 72820f2a95SStelian Pop #define LCD_BPP LCD_COLOR8 73f7aea46dSXu, Hong #define CONFIG_LCD_LOGO 74820f2a95SStelian Pop #undef LCD_TEST_PATTERN 75f7aea46dSXu, Hong #define CONFIG_LCD_INFO 76f7aea46dSXu, Hong #define CONFIG_LCD_INFO_BELOW_LOGO 77f7aea46dSXu, Hong #define CONFIG_SYS_WHITE_ON_BLACK 78f7aea46dSXu, Hong #define CONFIG_ATMEL_LCD 795ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9261EK 80f7aea46dSXu, Hong #define CONFIG_ATMEL_LCD_BGR555 815ccc2d99SSedji Gaouaou #endif 82f7aea46dSXu, Hong 83f7aea46dSXu, Hong #define CONFIG_SYS_CONSOLE_IS_IN_ENV 84820f2a95SStelian Pop 85a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 86a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 87a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ 88a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ 89a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ 90a484b00bSJean-Christophe PLAGNIOL-VILLARD 91d99a8ff6SStelian Pop #define CONFIG_BOOTDELAY 3 92d99a8ff6SStelian Pop 93d99a8ff6SStelian Pop /* 94d99a8ff6SStelian Pop * BOOTP options 95d99a8ff6SStelian Pop */ 96f7aea46dSXu, Hong #define CONFIG_BOOTP_BOOTFILESIZE 97f7aea46dSXu, Hong #define CONFIG_BOOTP_BOOTPATH 98f7aea46dSXu, Hong #define CONFIG_BOOTP_GATEWAY 99f7aea46dSXu, Hong #define CONFIG_BOOTP_HOSTNAME 100d99a8ff6SStelian Pop 101d99a8ff6SStelian Pop /* 102d99a8ff6SStelian Pop * Command line configuration. 103d99a8ff6SStelian Pop */ 104d99a8ff6SStelian Pop #include <config_cmd_default.h> 105d99a8ff6SStelian Pop #undef CONFIG_CMD_BDI 106d99a8ff6SStelian Pop #undef CONFIG_CMD_FPGA 10774de7aefSWolfgang Denk #undef CONFIG_CMD_IMI 108d99a8ff6SStelian Pop #undef CONFIG_CMD_IMLS 10974de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS 11074de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE 111d99a8ff6SStelian Pop 112f7aea46dSXu, Hong #define CONFIG_CMD_PING 113f7aea46dSXu, Hong #define CONFIG_CMD_DHCP 114f7aea46dSXu, Hong #define CONFIG_CMD_NAND 115f7aea46dSXu, Hong #define CONFIG_CMD_USB 116d99a8ff6SStelian Pop 117d99a8ff6SStelian Pop /* SDRAM */ 118d99a8ff6SStelian Pop #define CONFIG_NR_DRAM_BANKS 1 119f7aea46dSXu, Hong #define CONFIG_SYS_SDRAM_BASE 0x20000000 120f7aea46dSXu, Hong #define CONFIG_SYS_SDRAM_SIZE 0x04000000 121f7aea46dSXu, Hong #define CONFIG_SYS_INIT_SP_ADDR \ 122f7aea46dSXu, Hong (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) 123d99a8ff6SStelian Pop 124d99a8ff6SStelian Pop /* DataFlash */ 1254758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI 126f7aea46dSXu, Hong #define CONFIG_HAS_DATAFLASH 1276d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 1296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ 131d99a8ff6SStelian Pop #define AT91_SPI_CLK 15000000 132d99a8ff6SStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 133d99a8ff6SStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 134d99a8ff6SStelian Pop 135d99a8ff6SStelian Pop /* NAND flash */ 13674c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 13774c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 1386d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 140f7aea46dSXu, Hong #define CONFIG_SYS_NAND_DBW_8 14174c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD22 */ 14274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) 14374c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD21 */ 14474c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) 14574c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 14674c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 1472eb99ca8SWolfgang Denk 14874c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 149d99a8ff6SStelian Pop 150d99a8ff6SStelian Pop /* NOR flash - no real flash on this board */ 151f7aea46dSXu, Hong #define CONFIG_SYS_NO_FLASH 152d99a8ff6SStelian Pop 153d99a8ff6SStelian Pop /* Ethernet */ 154f7aea46dSXu, Hong #define CONFIG_DRIVER_DM9000 155d99a8ff6SStelian Pop #define CONFIG_DM9000_BASE 0x30000000 156d99a8ff6SStelian Pop #define DM9000_IO CONFIG_DM9000_BASE 157d99a8ff6SStelian Pop #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 158f7aea46dSXu, Hong #define CONFIG_DM9000_USE_16BIT 159f7aea46dSXu, Hong #define CONFIG_DM9000_NO_SROM 160d99a8ff6SStelian Pop #define CONFIG_NET_RETRY_COUNT 20 161f7aea46dSXu, Hong #define CONFIG_RESET_PHY_R 162d99a8ff6SStelian Pop 163d99a8ff6SStelian Pop /* USB */ 1642b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL 165f7aea46dSXu, Hong #define CONFIG_USB_OHCI_NEW 166f7aea46dSXu, Hong #define CONFIG_DOS_PARTITION 167f7aea46dSXu, Hong #define CONFIG_SYS_USB_OHCI_CPU_INIT 1686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ 1695ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9G10EK 1705ccc2d99SSedji Gaouaou #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" 1715ccc2d99SSedji Gaouaou #else 1726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" 1735ccc2d99SSedji Gaouaou #endif 1746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 175f7aea46dSXu, Hong #define CONFIG_USB_STORAGE 176f7aea46dSXu, Hong #define CONFIG_CMD_FAT 177d99a8ff6SStelian Pop 1786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 179d99a8ff6SStelian Pop 180f7aea46dSXu, Hong #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 1816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 182d99a8ff6SStelian Pop 1836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 184d99a8ff6SStelian Pop 185d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 186f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_DATAFLASH 1876d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1880e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1896d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1900e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 191e139cb31SAlexandre Belloni #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" 192d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 193d99a8ff6SStelian Pop "root=/dev/mtdblock0 " \ 194918319c7SAlbin Tonnerre "mtdparts=atmel_nand:-(root) " \ 195d99a8ff6SStelian Pop "rw rootfstype=jffs2" 196d99a8ff6SStelian Pop 19789a7a87fSNicolas Ferre #elif CONFIG_SYS_USE_DATAFLASH_CS3 19889a7a87fSNicolas Ferre 19989a7a87fSNicolas Ferre /* bootstrap + u-boot + env + linux in dataflash on CS3 */ 200f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_DATAFLASH 20189a7a87fSNicolas Ferre #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) 20289a7a87fSNicolas Ferre #define CONFIG_ENV_OFFSET 0x4200 20389a7a87fSNicolas Ferre #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) 20489a7a87fSNicolas Ferre #define CONFIG_ENV_SIZE 0x4200 205e139cb31SAlexandre Belloni #define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm" 20689a7a87fSNicolas Ferre #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 20789a7a87fSNicolas Ferre "root=/dev/mtdblock0 " \ 208918319c7SAlbin Tonnerre "mtdparts=atmel_nand:-(root) " \ 20989a7a87fSNicolas Ferre "rw rootfstype=jffs2" 21089a7a87fSNicolas Ferre 2116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 212d99a8ff6SStelian Pop 213d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 214f7aea46dSXu, Hong #define CONFIG_ENV_IS_IN_NAND 2150e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 2160e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 2170e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 218d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 219d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 220d99a8ff6SStelian Pop "root=/dev/mtdblock5 " \ 221918319c7SAlbin Tonnerre "mtdparts=atmel_nand:128k(bootstrap)ro," \ 222d99a8ff6SStelian Pop "256k(uboot)ro,128k(env1)ro," \ 223d99a8ff6SStelian Pop "128k(env2)ro,2M(linux),-(root) " \ 224d99a8ff6SStelian Pop "rw rootfstype=jffs2" 225d99a8ff6SStelian Pop 226d99a8ff6SStelian Pop #endif 227d99a8ff6SStelian Pop 2286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 2296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 2306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 2316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 232f7aea46dSXu, Hong #define CONFIG_SYS_LONGHELP 233f7aea46dSXu, Hong #define CONFIG_CMDLINE_EDITING 234e139cb31SAlexandre Belloni #define CONFIG_AUTO_COMPLETE 235d99a8ff6SStelian Pop 236d99a8ff6SStelian Pop /* 237d99a8ff6SStelian Pop * Size of malloc() pool 238d99a8ff6SStelian Pop */ 2396d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 240d99a8ff6SStelian Pop 241d99a8ff6SStelian Pop #endif 242