1*d99a8ff6SStelian Pop /* 2*d99a8ff6SStelian Pop * (C) Copyright 2007-2008 3*d99a8ff6SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 4*d99a8ff6SStelian Pop * Lead Tech Design <www.leadtechdesign.com> 5*d99a8ff6SStelian Pop * 6*d99a8ff6SStelian Pop * Configuation settings for the AT91SAM9261EK board. 7*d99a8ff6SStelian Pop * 8*d99a8ff6SStelian Pop * See file CREDITS for list of people who contributed to this 9*d99a8ff6SStelian Pop * project. 10*d99a8ff6SStelian Pop * 11*d99a8ff6SStelian Pop * This program is free software; you can redistribute it and/or 12*d99a8ff6SStelian Pop * modify it under the terms of the GNU General Public License as 13*d99a8ff6SStelian Pop * published by the Free Software Foundation; either version 2 of 14*d99a8ff6SStelian Pop * the License, or (at your option) any later version. 15*d99a8ff6SStelian Pop * 16*d99a8ff6SStelian Pop * This program is distributed in the hope that it will be useful, 17*d99a8ff6SStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 18*d99a8ff6SStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19*d99a8ff6SStelian Pop * GNU General Public License for more details. 20*d99a8ff6SStelian Pop * 21*d99a8ff6SStelian Pop * You should have received a copy of the GNU General Public License 22*d99a8ff6SStelian Pop * along with this program; if not, write to the Free Software 23*d99a8ff6SStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24*d99a8ff6SStelian Pop * MA 02111-1307 USA 25*d99a8ff6SStelian Pop */ 26*d99a8ff6SStelian Pop 27*d99a8ff6SStelian Pop #ifndef __CONFIG_H 28*d99a8ff6SStelian Pop #define __CONFIG_H 29*d99a8ff6SStelian Pop 30*d99a8ff6SStelian Pop /* ARM asynchronous clock */ 31*d99a8ff6SStelian Pop #define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */ 32*d99a8ff6SStelian Pop #define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */ 33*d99a8ff6SStelian Pop #define CFG_HZ 1000000 /* 1us resolution */ 34*d99a8ff6SStelian Pop 35*d99a8ff6SStelian Pop #define AT91_SLOW_CLOCK 32768 /* slow clock */ 36*d99a8ff6SStelian Pop 37*d99a8ff6SStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 38*d99a8ff6SStelian Pop #define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ 39*d99a8ff6SStelian Pop #define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */ 40*d99a8ff6SStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 41*d99a8ff6SStelian Pop 42*d99a8ff6SStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 43*d99a8ff6SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 44*d99a8ff6SStelian Pop #define CONFIG_INITRD_TAG 1 45*d99a8ff6SStelian Pop 46*d99a8ff6SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 47*d99a8ff6SStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 48*d99a8ff6SStelian Pop 49*d99a8ff6SStelian Pop /* 50*d99a8ff6SStelian Pop * Hardware drivers 51*d99a8ff6SStelian Pop */ 52*d99a8ff6SStelian Pop #define CONFIG_ATMEL_USART 1 53*d99a8ff6SStelian Pop #undef CONFIG_USART0 54*d99a8ff6SStelian Pop #undef CONFIG_USART1 55*d99a8ff6SStelian Pop #undef CONFIG_USART2 56*d99a8ff6SStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 57*d99a8ff6SStelian Pop 58*d99a8ff6SStelian Pop #define CONFIG_BOOTDELAY 3 59*d99a8ff6SStelian Pop 60*d99a8ff6SStelian Pop /* #define CONFIG_ENV_OVERWRITE 1 */ 61*d99a8ff6SStelian Pop 62*d99a8ff6SStelian Pop /* 63*d99a8ff6SStelian Pop * BOOTP options 64*d99a8ff6SStelian Pop */ 65*d99a8ff6SStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 66*d99a8ff6SStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 67*d99a8ff6SStelian Pop #define CONFIG_BOOTP_GATEWAY 1 68*d99a8ff6SStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 69*d99a8ff6SStelian Pop 70*d99a8ff6SStelian Pop /* 71*d99a8ff6SStelian Pop * Command line configuration. 72*d99a8ff6SStelian Pop */ 73*d99a8ff6SStelian Pop #include <config_cmd_default.h> 74*d99a8ff6SStelian Pop #undef CONFIG_CMD_BDI 75*d99a8ff6SStelian Pop #undef CONFIG_CMD_IMI 76*d99a8ff6SStelian Pop #undef CONFIG_CMD_AUTOSCRIPT 77*d99a8ff6SStelian Pop #undef CONFIG_CMD_FPGA 78*d99a8ff6SStelian Pop #undef CONFIG_CMD_LOADS 79*d99a8ff6SStelian Pop #undef CONFIG_CMD_IMLS 80*d99a8ff6SStelian Pop 81*d99a8ff6SStelian Pop #define CONFIG_CMD_PING 1 82*d99a8ff6SStelian Pop #define CONFIG_CMD_DHCP 1 83*d99a8ff6SStelian Pop #define CONFIG_CMD_NAND 1 84*d99a8ff6SStelian Pop #define CONFIG_CMD_USB 1 85*d99a8ff6SStelian Pop 86*d99a8ff6SStelian Pop /* SDRAM */ 87*d99a8ff6SStelian Pop #define CONFIG_NR_DRAM_BANKS 1 88*d99a8ff6SStelian Pop #define PHYS_SDRAM 0x20000000 89*d99a8ff6SStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 90*d99a8ff6SStelian Pop 91*d99a8ff6SStelian Pop /* DataFlash */ 92*d99a8ff6SStelian Pop #define CONFIG_HAS_DATAFLASH 1 93*d99a8ff6SStelian Pop #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) 94*d99a8ff6SStelian Pop #define CFG_MAX_DATAFLASH_BANKS 2 95*d99a8ff6SStelian Pop #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 96*d99a8ff6SStelian Pop #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ 97*d99a8ff6SStelian Pop #define AT91_SPI_CLK 15000000 98*d99a8ff6SStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 99*d99a8ff6SStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 100*d99a8ff6SStelian Pop 101*d99a8ff6SStelian Pop /* NAND flash */ 102*d99a8ff6SStelian Pop #define NAND_MAX_CHIPS 1 103*d99a8ff6SStelian Pop #define CFG_MAX_NAND_DEVICE 1 104*d99a8ff6SStelian Pop #define CFG_NAND_BASE 0x40000000 105*d99a8ff6SStelian Pop #define CFG_NAND_DBW_8 1 106*d99a8ff6SStelian Pop 107*d99a8ff6SStelian Pop /* NOR flash - no real flash on this board */ 108*d99a8ff6SStelian Pop #define CFG_NO_FLASH 1 109*d99a8ff6SStelian Pop 110*d99a8ff6SStelian Pop /* Ethernet */ 111*d99a8ff6SStelian Pop #define CONFIG_DRIVER_DM9000 1 112*d99a8ff6SStelian Pop #define CONFIG_DM9000_BASE 0x30000000 113*d99a8ff6SStelian Pop #define DM9000_IO CONFIG_DM9000_BASE 114*d99a8ff6SStelian Pop #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 115*d99a8ff6SStelian Pop #define CONFIG_DM9000_USE_16BIT 1 116*d99a8ff6SStelian Pop #define CONFIG_NET_RETRY_COUNT 20 117*d99a8ff6SStelian Pop #define CONFIG_RESET_PHY_R 1 118*d99a8ff6SStelian Pop 119*d99a8ff6SStelian Pop /* USB */ 120*d99a8ff6SStelian Pop #define CONFIG_USB_OHCI_NEW 1 121*d99a8ff6SStelian Pop #define LITTLEENDIAN 1 122*d99a8ff6SStelian Pop #define CONFIG_DOS_PARTITION 1 123*d99a8ff6SStelian Pop #define CFG_USB_OHCI_CPU_INIT 1 124*d99a8ff6SStelian Pop #define CFG_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ 125*d99a8ff6SStelian Pop #define CFG_USB_OHCI_SLOT_NAME "at91sam9261" 126*d99a8ff6SStelian Pop #define CFG_USB_OHCI_MAX_ROOT_PORTS 2 127*d99a8ff6SStelian Pop #define CONFIG_USB_STORAGE 1 128*d99a8ff6SStelian Pop 129*d99a8ff6SStelian Pop #define CFG_LOAD_ADDR 0x22000000 /* load address */ 130*d99a8ff6SStelian Pop 131*d99a8ff6SStelian Pop #define CFG_MEMTEST_START PHYS_SDRAM 132*d99a8ff6SStelian Pop #define CFG_MEMTEST_END 0x23e00000 133*d99a8ff6SStelian Pop 134*d99a8ff6SStelian Pop #define CFG_USE_DATAFLASH_CS0 1 135*d99a8ff6SStelian Pop #undef CFG_USE_NANDFLASH 136*d99a8ff6SStelian Pop 137*d99a8ff6SStelian Pop #ifdef CFG_USE_DATAFLASH_CS0 138*d99a8ff6SStelian Pop 139*d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 140*d99a8ff6SStelian Pop #define CFG_ENV_IS_IN_DATAFLASH 1 141*d99a8ff6SStelian Pop #define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 142*d99a8ff6SStelian Pop #define CFG_ENV_OFFSET 0x4200 143*d99a8ff6SStelian Pop #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) 144*d99a8ff6SStelian Pop #define CFG_ENV_SIZE 0x4200 145*d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 146*d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 147*d99a8ff6SStelian Pop "root=/dev/mtdblock0 " \ 148*d99a8ff6SStelian Pop "mtdparts=at91_nand:-(root) " \ 149*d99a8ff6SStelian Pop "rw rootfstype=jffs2" 150*d99a8ff6SStelian Pop 151*d99a8ff6SStelian Pop #else /* CFG_USE_NANDFLASH */ 152*d99a8ff6SStelian Pop 153*d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 154*d99a8ff6SStelian Pop #define CFG_ENV_IS_IN_NAND 1 155*d99a8ff6SStelian Pop #define CFG_ENV_OFFSET 0x60000 156*d99a8ff6SStelian Pop #define CFG_ENV_OFFSET_REDUND 0x80000 157*d99a8ff6SStelian Pop #define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 158*d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 159*d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 160*d99a8ff6SStelian Pop "root=/dev/mtdblock5 " \ 161*d99a8ff6SStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro," \ 162*d99a8ff6SStelian Pop "256k(uboot)ro,128k(env1)ro," \ 163*d99a8ff6SStelian Pop "128k(env2)ro,2M(linux),-(root) " \ 164*d99a8ff6SStelian Pop "rw rootfstype=jffs2" 165*d99a8ff6SStelian Pop 166*d99a8ff6SStelian Pop #endif 167*d99a8ff6SStelian Pop 168*d99a8ff6SStelian Pop #define CONFIG_BAUDRATE 115200 169*d99a8ff6SStelian Pop #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 170*d99a8ff6SStelian Pop 171*d99a8ff6SStelian Pop #define CFG_PROMPT "U-Boot> " 172*d99a8ff6SStelian Pop #define CFG_CBSIZE 256 173*d99a8ff6SStelian Pop #define CFG_MAXARGS 16 174*d99a8ff6SStelian Pop #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) 175*d99a8ff6SStelian Pop #define CFG_LONGHELP 1 176*d99a8ff6SStelian Pop #define CONFIG_CMDLINE_EDITING 1 177*d99a8ff6SStelian Pop 178*d99a8ff6SStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 179*d99a8ff6SStelian Pop /* 180*d99a8ff6SStelian Pop * Size of malloc() pool 181*d99a8ff6SStelian Pop */ 182*d99a8ff6SStelian Pop #define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000) 183*d99a8ff6SStelian Pop #define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 184*d99a8ff6SStelian Pop 185*d99a8ff6SStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 186*d99a8ff6SStelian Pop 187*d99a8ff6SStelian Pop #ifdef CONFIG_USE_IRQ 188*d99a8ff6SStelian Pop #error CONFIG_USE_IRQ not supported 189*d99a8ff6SStelian Pop #endif 190*d99a8ff6SStelian Pop 191*d99a8ff6SStelian Pop #endif 192